| Model version | 'M102C102R103' |
| Author | xigkd |
| Last saved | Fri Sep 17 14:41:34 2021 |
| Harness model(s) | FSD_Harness1 |
| Harness model owner | FSD |
| Default parameter behavior | inlined |
| Block reduction | forced off |
| Conditional branch optimization | on |
| Analyzed model | FSD |
| Logic block short circuiting | off |
| MCDC mode | masking |
| Test# | Started execution | Ended execution |
| Test 1 | 17-Sep-2021 14:49:05 | 17-Sep-2021 14:49:05 |
| Model Hierarchy/Complexity | Test 1 | |||||||||||||||||||||||||
| Decision | Condition | MCDC | Execution | |||||||||||||||||||||||
| 1. FSD | 12 | 89% |
|
83% |
|
0% |
|
100% |
|
|||||||||||||||||
| 2. . . . FSD | 7 | 89% |
|
83% |
|
0% |
|
100% |
|
|||||||||||||||||
| 3. . . . . . . FuseDiag_100ms | 7 | 89% |
|
83% |
|
0% |
|
100% |
|
|||||||||||||||||
| 4. . . . . . . . . . FuseDiag_100ms_sys | 6 | 88% |
|
83% |
|
0% |
|
100% |
|
|||||||||||||||||
| 5. . . . . . . . . . . . . BMSDelay | 4 | 100% |
|
100% |
|
NA | 100% |
|
||||||||||||||||||
| 6. . . . . . . . . . . . . . . . Unit Delay Resettable | 2 | 100% |
|
NA | NA | 100% |
|
|||||||||||||||||||
| 7. . . . . . . . . . . . . FSD_GbFSD_MSDOpenFlt_flg | 2 | 50% |
|
NA | NA | 100% |
|
|||||||||||||||||||
|
|
Decisions analyzed
|
|
Conditions analyzed
MC/DC analysis (combinations in parentheses did not occur)
| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Conditions analyzed
|
Conditions analyzed
|
Conditions analyzed
|
|
|
|
|
|
|
Decisions analyzed
|
|