| Model version | 'M100C100' |
| Author | xigkd |
| Last saved | Thu Apr 08 15:45:56 2021 |
| Harness model(s) | UT_HVL_0001 |
| Harness model owner | HVL_UT |
| Default parameter behavior | inlined |
| Block reduction | forced off |
| Conditional branch optimization | on |
| Analyzed model | HVL_UT |
| Logic block short circuiting | off |
| MCDC mode | masking |
| Test# | Started execution | Ended execution |
| Test 1 | 12-Apr-2021 13:45:04 | 12-Apr-2021 13:45:05 |
| Model Hierarchy/Complexity | Test 1 | |||||||||||||||||||||||||
| Decision | Condition | MCDC | Execution | |||||||||||||||||||||||
| 1. HVL_UT | 23 | 65% |
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59% |
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0% |
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100% |
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| 2. . . . HVIL_20ms_sys | 18 | 65% |
|
59% |
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0% |
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100% |
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| 3. . . . . . . HVLSelfCheck_Enable | 6 | 88% |
|
90% |
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0% |
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100% |
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| 4. . . . . . . . . . BMSDelay | 4 | 83% |
|
75% |
|
NA | 100% |
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| 5. . . . . . . . . . . . . Unit Delay Resettable | 2 | 75% |
|
NA | NA | 100% |
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| 6. . . . . . . HVL_GbHVL_HvilLFlt_flg | 2 | 50% |
|
NA | NA | 100% |
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| 7. . . . . . . HVL_GbHVL_HvilSTG_flg | 2 | 50% |
|
NA | NA | 100% |
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| 8. . . . . . . HVL_GbHVL_HvilSTV_flg | 2 | 50% |
|
NA | NA | 100% |
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| 9. . . . . . . HVL_GbHVL_HvilSelfCheck_flg | 2 | 50% |
|
NA | NA | 100% |
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| 10. . . . . . . HVL_GcHVL_HvilDutySet_pct | 2 | 50% |
|
NA | NA | 100% |
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| 11. . . . . . . HVL_GcHVL_HvilPerSet_us | 2 | 50% |
|
NA | NA | 100% |
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Conditions analyzed
MC/DC analysis (combinations in parentheses did not occur) Includes 3 blocks
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MC/DC analysis (combinations in parentheses did not occur) Includes 5 blocks
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Conditions analyzed
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Conditions analyzed
MC/DC analysis (combinations in parentheses did not occur) Includes 3 blocks
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Conditions analyzed
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