# Coverage Report for LDP_UT

## Table of Contents

1. Analysis Information
2. Tests
3. Summary
4. Details

## Analysis Information

### Model Information

Model version | 'M104C110'
Author | xigkd
Last saved | Fri Apr 09 15:46:53 2021

### Harness information

Harness model(s) | UT_LDP_0001
Harness model owner | LDP_UT

### Simulation Optimization Options

Default parameter behavior | inlined
Block reduction | forced off
Conditional branch optimization | on

### Coverage Options

Analyzed model | LDP_UT
Logic block short circuiting | off
MCDC mode | masking

### Blocks Eliminated from Coverage Analysis

# Model Object | Rationale
LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet/Logical2 | It might not be executed because of Conditional input branch optimization
LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet/Logical3 | It might not be executed because of Conditional input branch optimization
LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/FaultProcess/Decrease/Relational Operator | It might not be executed because of Conditional input branch optimization
LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/HealProcess/Switch | It might not be executed because of Conditional input branch optimization
LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess/Decrease/Relational Operator | It might not be executed because of Conditional input branch optimization
LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess/Increase/Saturation | It might not be executed because of Conditional input branch optimization
LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess/Decrease/Relational Operator | It might not be executed because of Conditional input branch optimization
LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess/Decrease/Switch | It might not be executed because of Conditional input branch optimization
LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess/Switch | It might not be executed because of Conditional input branch optimization

## Tests

Test# | Started execution | Ended execution
Test 1 | 09-Apr-2021 17:13:53 | 09-Apr-2021 17:13:54

## Summary

Model Hierarchy/Complexity | Test 1 |
|  | Decision | Condition | MCDC | Execution |

1. LDP_UT

211

57%

62%

2%

96%

2. . . . LowVolyPrc_10ms_sys

206

57%

62%

2%

96%

3. . . . . . . LowVoltSignalDiag

46

50%

59%

0%

100%

4. . . . . . . . . . ChrgGunConnetcFltDet

6

50%

54%

0%

100%

5. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum

2

50%

NA

NA

100%

6. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum1

2

50%

NA

NA

100%

7. . . . . . . . . . DCChrgNegTempFltDet

4

50%

50%

0%

100%

8. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum

2

50%

NA

NA

100%

9. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum1

2

50%

NA

NA

100%

10. . . . . . . . . . DCChrgNegTempHiFltDet

2

50%

50%

0%

100%

11. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum

2

50%

NA

NA

100%

12. . . . . . . . . . DCChrgPosTempFltDet

4

50%

50%

0%

100%

13. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum

2

50%

NA

NA

100%

14. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum1

2

50%

NA

NA

100%

15. . . . . . . . . . DCChrgPosTempHiFltDet

2

50%

50%

0%

100%

16. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum

2

50%

NA

NA

100%

17. . . . . . . . . . IntWtTempFltDet

4

50%

75%

NA

100%

18. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum

2

50%

NA

NA

100%

19. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum1

2

50%

NA

NA

100%

20. . . . . . . . . . IntWtTempHiFltDet

2

50%

83%

0%

100%

21. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum

2

50%

NA

NA

100%

22. . . . . . . . . . IntWtTempHiFltDet1

2

50%

83%

0%

100%

23. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum

2

50%

NA

NA

100%

24. . . . . . . . . . LDP_GbLDP_CC2STG_flg

2

50%

NA

NA

100%

25. . . . . . . . . . LDP_GbLDP_CC2STG_flg1

2

50%

NA

NA

100%

26. . . . . . . . . . LDP_GbLDP_CC2VoltRaty_flg

2

50%

NA

NA

100%

27. . . . . . . . . . LDP_GbLDP_DCPlugNegTempSTGFlt_flg

2

50%

NA

NA

100%

28. . . . . . . . . . LDP_GbLDP_DCPlugNegTempSTVFlt_flg

2

50%

NA

NA

100%

29. . . . . . . . . . LDP_GbLDP_DCPlugPosTempSTGFlt_flg

2

50%

NA

NA

100%

30. . . . . . . . . . LDP_GbLDP_DCPlugPosTempSTVFlt_flg

2

50%

NA

NA

100%

31. . . . . . . . . . LDP_GeLDP_DCPlugTempState_enum

2

50%

NA

NA

100%

32. . . . . . . . . . OutWtTempFltDet

4

50%

75%

NA

100%

33. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum

2

50%

NA

NA

100%

34. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum1

2

50%

NA

NA

100%

35. . . . . . . LowVoltSignalProc

160

59%

73%

20%

93%

36. . . . . . . . . . BmuSplyVoltProc

5

67%

NA

NA

100%

37. . . . . . . . . . . . . LDP_GbLDP_BmuSplyVoltVld_flg

2

50%

NA

NA

100%

38. . . . . . . . . . . . . LDP_GcLDP_BmuSplyVolt_mV

2

50%

NA

NA

100%

39. . . . . . . . . . CC2StateDet

17

67%

82%

33%

96%

40. . . . . . . . . . . . . BMSDebounceStartZero

14

65%

83%

NA

94%

41. . . . . . . . . . . . . . . . Compare To Zero

NA

50%

NA

100%

42. . . . . . . . . . . . . . . . FaultProcess

6

67%

75%

NA

93%

43. . . . . . . . . . . . . . . . . . . Decrease

1

50%

50%

NA

75%

44. . . . . . . . . . . . . . . . . . . . . . Nomal

NA

NA

NA

0%

45. . . . . . . . . . . . . . . . . . . Increase

2

50%

NA

NA

100%

46. . . . . . . . . . . . . . . . HealProcess

6

67%

100%

NA

93%

47. . . . . . . . . . . . . . . . . . . Compare To Zero

NA

100%

NA

100%

48. . . . . . . . . . . . . . . . . . . Decrease

1

100%

100%

NA

100%

49. . . . . . . . . . . . . . . . . . . . . . Nomal

NA

NA

NA

100%

50. . . . . . . . . . . . . . . . . . . Increase

2

50%

NA

NA

100%

51. . . . . . . . . . . . . LDP_GeLDP_CC2St_enum

2

50%

NA

NA

100%

52. . . . . . . . . . CC2VoltProc

5

67%

NA

NA

100%

53. . . . . . . . . . . . . LDP_GbLDP_CC2VoltVld_flg

2

50%

NA

NA

100%

54. . . . . . . . . . . . . LDP_GcLDP_CC2Volt_mV

2

50%

NA

NA

100%

55. . . . . . . . . . ChrgNegHsdCrntProc

5

67%

NA

NA

100%

56. . . . . . . . . . . . . LDP_GbLDP_ChrgNegHsdCrntVld_flg

2

50%

NA

NA

100%

57. . . . . . . . . . . . . LDP_GcLDP_ChrgNegHsdCrnt_mV

2

50%

NA

NA

100%

58. . . . . . . . . . ChrgNegHsdVoltProc

5

67%

NA

NA

100%

59. . . . . . . . . . . . . LDP_GbLDP_ChrgNegHsdVoltVld_flg

2

50%

NA

NA

100%

60. . . . . . . . . . . . . LDP_GcLDP_ChrgNegHsdVolt_mV

2

50%

NA

NA

100%

61. . . . . . . . . . ChrgNegTempProc

7

50%

NA

NA

93%

62. . . . . . . . . . . . . LDP_GbLDP_ChrgNegTempVld_flg

2

50%

NA

NA

100%

63. . . . . . . . . . . . . LDP_GcLDP_ChrgNegTemp_mV

2

50%

NA

NA

100%

64. . . . . . . . . . . . . LDP_GcLDP_ChrgNegTemp_mV1

2

50%

NA

NA

100%

65. . . . . . . . . . ChrgPosHsdCrntProc

5

67%

NA

NA

100%

66. . . . . . . . . . . . . LDP_GbLDP_ChrgPosHsdCrntVld_flg

2

50%

NA

NA

100%

67. . . . . . . . . . . . . LDP_GcLDP_ChrgPosHsdCrnt_mV

2

50%

NA

NA

100%

68. . . . . . . . . . ChrgPosHsdVoltProc

5

67%

NA

NA

100%

69. . . . . . . . . . . . . LDP_GbLDP_ChrgPosHsdVoltVld_flg

2

50%

NA

NA

100%

70. . . . . . . . . . . . . LDP_GcLDP_ChrgPosHsdVolt_mV

2

50%

NA

NA

100%

71. . . . . . . . . . ChrgPosTempProc

7

50%

NA

NA

93%

72. . . . . . . . . . . . . LDP_GbLDP_ChrgPosTempVld_flg

2

50%

NA

NA

100%

73. . . . . . . . . . . . . LDP_GcLDP_ChrgNegTemp_mV1

2

50%

NA

NA

100%

74. . . . . . . . . . . . . LDP_GcLDP_ChrgPosTemp_mV

2

50%

NA

NA

100%

75. . . . . . . . . . CrntSensVoltProc

5

67%

100%

NA

100%

76. . . . . . . . . . . . . LDP_GbLDP_CrntSensVld_flg

2

50%

NA

NA

100%

77. . . . . . . . . . . . . LDP_GcLDP_CrntSens_mV

2

50%

NA

NA

100%

78. . . . . . . . . . CshFbkProc

7

50%

NA

NA

81%

79. . . . . . . . . . . . . LDP_GcLDP_CshDutyFbk_pct

2

50%

NA

NA

100%

80. . . . . . . . . . . . . LDP_GcLDP_CshPerFbk_us

2

50%

NA

NA

100%

81. . . . . . . . . . . . . LDP_GcLDP_CshStFbk_numb

2

50%

NA

NA

100%

82. . . . . . . . . . CshOutProc

7

50%

NA

NA

81%

83. . . . . . . . . . . . . LDP_GcLDP_CshDutyOut_pct

2

50%

NA

NA

100%

84. . . . . . . . . . . . . LDP_GcLDP_CshPerOut_us

2

50%

NA

NA

100%

85. . . . . . . . . . . . . LDP_GcLDP_CshSt_numb

2

50%

NA

NA

100%

86. . . . . . . . . . DCSuplyVoltProc

5

67%

NA

NA

100%

87. . . . . . . . . . . . . LDP_GbLDP_DCSuplyVoltVld_flg

2

50%

NA

NA

100%

88. . . . . . . . . . . . . LDP_GcLDP_DCSuplyVolt_mV

2

50%

NA

NA

100%

89. . . . . . . . . . DCSupplyStateDet

16

39%

60%

0%

84%

90. . . . . . . . . . . . . BMSDebounceStartZero1

14

38%

50%

NA

78%

91. . . . . . . . . . . . . . . . Compare To Zero

NA

50%

NA

100%

92. . . . . . . . . . . . . . . . FaultProcess

6

33%

50%

NA

79%

93. . . . . . . . . . . . . . . . . . . Decrease

1

50%

50%

NA

75%

94. . . . . . . . . . . . . . . . . . . . . . Nomal

NA

NA

NA

0%

95. . . . . . . . . . . . . . . . . . . Increase

2

0%

NA

NA

0%

96. . . . . . . . . . . . . . . . HealProcess

6

42%

50%

NA

73%

97. . . . . . . . . . . . . . . . . . . Compare To Zero

NA

50%

NA

100%

98. . . . . . . . . . . . . . . . . . . Decrease

1

0%

0%

NA

25%

99. . . . . . . . . . . . . . . . . . . . . . Nomal

NA

NA

NA

0%

100. . . . . . . . . . . . . . . . . . . Increase

2

50%

NA

NA

100%

101. . . . . . . . . . . . . LDP_GbLDP_DC12VSply_flg

2

50%

NA

NA

100%

102. . . . . . . . . . HallSplyVoltProc

5

67%

NA

NA

100%

103. . . . . . . . . . . . . LDP_GbLDP_HallSplyVoltVld_flg

2

50%

NA

NA

100%

104. . . . . . . . . . . . . LDP_GcLDP_HallSplyVolt_mV

2

50%

NA

NA

100%

105. . . . . . . . . . HvilFbkProc

7

50%

NA

NA

81%

106. . . . . . . . . . . . . LDP_GcLDP_HvilDutyFbkt_pct

2

50%

NA

NA

100%

107. . . . . . . . . . . . . LDP_GcLDP_HvilPerFbk_us

2

50%

NA

NA

100%

108. . . . . . . . . . . . . LDP_GcLDP_HvilStFbk_numb

2

50%

NA

NA

100%

109. . . . . . . . . . HvilOutProc

7

50%

NA

NA

81%

110. . . . . . . . . . . . . LDP_GcLDP_HvilDutyOut_pct

2

50%

NA

NA

100%

111. . . . . . . . . . . . . LDP_GcLDP_HvilPerOut_us

2

50%

NA

NA

100%

112. . . . . . . . . . . . . LDP_GcLDP_HvilSt_numb

2

50%

NA

NA

100%

113. . . . . . . . . . Kl30CVoltProc

5

67%

NA

NA

100%

114. . . . . . . . . . . . . LDP_GbLDP_Kl30CVoltVld_flg

2

50%

NA

NA

100%

115. . . . . . . . . . . . . LDP_GcLDP_Kl30CVolt_mV

2

50%

NA

NA

100%

116. . . . . . . . . . Kl30VoltProc

5

67%

NA

NA

100%

117. . . . . . . . . . . . . LDP_GbLDP_Kl30VoltVld_flg

2

50%

NA

NA

100%

118. . . . . . . . . . . . . LDP_GcLDP_Kl30Volt_mV

2

50%

NA

NA

100%

119. . . . . . . . . . NegHsdCrntProc

5

67%

NA

NA

100%

120. . . . . . . . . . . . . LDP_GbLDP_NegHsdCrntVld_flg

2

50%

NA

NA

100%

121. . . . . . . . . . . . . LDP_GcLDP_NegHsdCrnt_mV

2

50%

NA

NA

100%

122. . . . . . . . . . NegHsdVoltProc

5

67%

NA

NA

100%

123. . . . . . . . . . . . . LDP_GbLDP_NegHsdVoltVld_flg

2

50%

NA

NA

100%

124. . . . . . . . . . . . . LDP_GcLDP_NegHsdVolt_mV

2

50%

NA

NA

100%

125. . . . . . . . . . OutWtSensVoltProc

5

67%

NA

NA

100%

126. . . . . . . . . . . . . LDP_GbLDP_OutWtSensVoltVld_flg

2

50%

NA

NA

100%

127. . . . . . . . . . . . . LDP_GcLDP_OutWtTemp_C

2

50%

NA

NA

100%

128. . . . . . . . . . PosHsdCrntProc

5

67%

NA

NA

100%

129. . . . . . . . . . . . . LDP_GbLDP_PosHsdCrntVld_flg

2

50%

NA

NA

100%

130. . . . . . . . . . . . . LDP_GcLDP_PosHsdCrnt_mV

2

50%

NA

NA

100%

131. . . . . . . . . . PosHsdVoltProc

5

67%

NA

NA

100%

132. . . . . . . . . . . . . LDP_GbLDP_PosHsdVoltVld_flg

2

50%

NA

NA

100%

133. . . . . . . . . . . . . LDP_GcLDP_PosHsdVolt_mV

2

50%

NA

NA

100%

134. . . . . . . . . . lntWtSensVoltProc

5

67%

NA

NA

100%

135. . . . . . . . . . . . . LDP_GbLDP_lntWtSensVoltVld_flg

2

50%

NA

NA

100%

136. . . . . . . . . . . . . LDP_GcLDP_lntWtTemp_C

2

50%

NA

NA

100%

## Details

### 1. Model "LDP_UT"

Child Systems: | LowVolyPrc_10ms_sys

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 211
Condition | NA | 62% (114/184) condition outcomes
Decision | NA | 57% (147/256) decision outcomes
MCDC | NA | 2% (1/41) conditions reversed the outcome
Execution | NA | 96% (496/519) objective outcomes

### 2. SubSystem block "LowVolyPrc_10ms_sys"

Justify or Exclude

Parent: | /LDP_UT
Child Systems: | LowVoltSignalDiag, LowVoltSignalProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 206
Condition | NA | 62% (114/184) condition outcomes
Decision | NA | 57% (147/256) decision outcomes
MCDC | NA | 2% (1/41) conditions reversed the outcome
Execution | NA | 96% (496/519) objective outcomes

### 3. SubSystem block "LowVoltSignalDiag"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys

Child Systems:

ChrgGunConnetcFltDet, DCChrgNegTempFltDet, DCChrgNegTempHiFltDet, DCChrgPosTempFltDet, DCChrgPosTempHiFltDet, IntWtTempFltDet, IntWtTempHiFltDet, IntWtTempHiFltDet1, LDP_GbLDP_CC2STG_flg, LDP_GbLDP_CC2STG_flg1, LDP_GbLDP_CC2VoltRaty_flg, LDP_GbLDP_DCPlugNegTempSTGFlt_flg, LDP_GbLDP_DCPlugNegTempSTVFlt_flg, LDP_GbLDP_DCPlugPosTempSTGFlt_flg, LDP_GbLDP_DCPlugPosTempSTVFlt_flg, LDP_GeLDP_DCPlugTempState_enum, OutWtTempFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 46
Condition | NA | 59% (82/140) condition outcomes
Decision | NA | 50% (24/48) decision outcomes
MCDC | NA | 0% (0/36) conditions reversed the outcome
Execution | NA | 100% (166/166) objective outcomes

#### Full Coverage

Model Object | Metric
Constant block "Constant1" | Execution
Constant block "Constant2" | Execution
Constant block "Constant3" | Execution
Constant block "Constant4" | Execution
Constant block "Constant5" | Execution
Constant block "Constant6" | Execution
Constant block "Constant7" | Execution

### 4. SubSystem block "ChrgGunConnetcFltDet"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag
Child Systems: | LDP_GeLDP_CC2St_enum, LDP_GeLDP_CC2St_enum1

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 6
Condition | NA | 54% (26/48) condition outcomes
Decision | NA | 50% (4/8) decision outcomes
MCDC | NA | 0% (0/14) conditions reversed the outcome
Execution | NA | 100% (37/37) objective outcomes

#### Logic block "Logical"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 75% (3/4) condition outcomes
MCDC | 0% (0/2) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 1 | 100
input port 2 | 0 | 101

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | (TT) | (FT)
input port 2 | (TT) | TF

#### Logic block "Logical1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (6/12) condition outcomes
MCDC | 0% (0/6) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 0 | 101
input port 2 | 0 | 101
input port 3 | 0 | 101
input port 4 | 0 | 101
input port 5 | 0 | 101
input port 6 | 0 | 101

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | (TFFFFF) | FFFFFF
input port 2 | (FTFFFF) | FFFFFF
input port 3 | (FFTFFF) | FFFFFF
input port 4 | (FFFTFF) | FFFFFF
input port 5 | (FFFFTF) | FFFFFF
input port 6 | (FFFFFT) | FFFFFF

#### Logic block "Logical2"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (2/4) condition outcomes
MCDC | 0% (0/4) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 0 | 101
input port 2 | 0 | 101

MC/DC analysis (combinations in parentheses did not occur)
Includes 2 blocks

Decision/Condition | True Out | False Out
C1 && ((C2 || C3) || C4) |
C1 (Logical2 In1) | (TTTT) | (FTTT)
C2 (Logical3 In1) | (TTFF) | (TFFF)
C3 (Logical3 In2) | (TFTF) | (TFFF)
C4 (Logical3 In3) | (TFFT) | (TFFF)

#### Logic block "Logical3"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (3/6) condition outcomes
MCDC | see Logical2
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 0 | 101
input port 2 | 0 | 101
input port 3 | 0 | 101

#### Logic block "Logical4"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (2/4) condition outcomes
MCDC | 0% (0/2) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 0 | 101
input port 2 | 0 | 101

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | (TF) | FF
input port 2 | (FT) | FF

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Switch block "Switch1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### RelationalOperator block "Comparison1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### RelationalOperator block "Comparison2"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### RelationalOperator block "Comparison3"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### RelationalOperator block "Comparison5"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### RelationalOperator block "Comparison6"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### RelationalOperator block "Comparison7"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### RelationalOperator block "Comparison8"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### RelationalOperator block "Comparison9"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### Full Coverage

Model Object | Metric
DataTypeConversion block "Data Type Conversion1" | Execution
DataTypeConversion block "Data Type Conversion2" | Execution
DataTypeConversion block "Data Type Conversion3" | Execution
RelationalOperator block "Comparison4" | Condition, Execution
Constant block "Constant" | Execution
Constant block "Constant1" | Execution
Constant block "Constant10" | Execution
Constant block "Constant11" | Execution
Constant block "Constant2" | Execution
Constant block "Constant3" | Execution
Constant block "Constant4" | Execution
Constant block "Constant5" | Execution
Constant block "Constant6" | Execution
Constant block "Constant7" | Execution
Constant block "Constant8" | Execution
Constant block "Constant9" | Execution

### 5. SubSystem block "LDP_GeLDP_CC2St_enum"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet/LDP_GeLDP_CC2St_enum
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 6. SubSystem block "LDP_GeLDP_CC2St_enum1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/ChrgGunConnetcFltDet/LDP_GeLDP_CC2St_enum1
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 7. SubSystem block "DCChrgNegTempFltDet"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag
Child Systems: | LDP_GeLDP_CC2St_enum, LDP_GeLDP_CC2St_enum1

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 4
Condition | NA | 50% (7/14) condition outcomes
Decision | NA | 50% (2/4) decision outcomes
MCDC | NA | 0% (0/4) conditions reversed the outcome
Execution | NA | 100% (16/16) objective outcomes

#### Logic block "Logical"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (2/4) condition outcomes
MCDC | 0% (0/2) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 0 | 101
input port 2 | 101 | 0

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | (TT) | FT
input port 2 | (TT) | (TF)

#### Logic block "Logical1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (2/4) condition outcomes
MCDC | 0% (0/2) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 101 | 0
input port 2 | 101 | 0

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | TT | (FT)
input port 2 | TT | (TF)

#### RelationalOperator block "Comparison"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 > input2 | 0 | 101

#### RelationalOperator block "Comparison1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 < input2 | 101 | 0

#### RelationalOperator block "Comparison2"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### Full Coverage

Model Object | Metric
DataTypeConversion block "Data Type Conversion" | Execution
Constant block "Constant3" | Execution
Constant block "Constant4" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm1" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm10" | Execution

### 8. SubSystem block "LDP_GeLDP_CC2St_enum"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempFltDet/LDP_GeLDP_CC2St_enum
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 9. SubSystem block "LDP_GeLDP_CC2St_enum1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempFltDet/LDP_GeLDP_CC2St_enum1
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 10. SubSystem block "DCChrgNegTempHiFltDet"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag
Child Systems: | LDP_GeLDP_CC2St_enum

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 2
Condition | NA | 50% (8/16) condition outcomes
Decision | NA | 50% (1/2) decision outcomes
MCDC | NA | 0% (0/4) conditions reversed the outcome
Execution | NA | 100% (13/13) objective outcomes

#### Logic block "Logical1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (4/8) condition outcomes
MCDC | 0% (0/4) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 0 | 101
input port 2 | 101 | 0
input port 3 | 0 | 101
input port 4 | 101 | 0

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | (TTTT) | (FTTT)
input port 2 | (TTTT) | (TFTT)
input port 3 | (TTTT) | (TTFT)
input port 4 | (TTTT) | (TTTF)

#### RelationalOperator block "Comparison1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 >= input2 | 101 | 0

#### RelationalOperator block "Comparison2"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### RelationalOperator block "Relational Operator1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### RelationalOperator block "Relational Operator3"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 101 | 0

#### Full Coverage

Model Object | Metric
DataTypeConversion block "Data Type Conversion" | Execution
Constant block "Constant1" | Execution
Constant block "Constant3" | Execution
Constant block "Constant4" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm10" | Execution

### 11. SubSystem block "LDP_GeLDP_CC2St_enum"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempHiFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgNegTempHiFltDet/LDP_GeLDP_CC2St_enum
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 12. SubSystem block "DCChrgPosTempFltDet"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag
Child Systems: | LDP_GeLDP_CC2St_enum, LDP_GeLDP_CC2St_enum1

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 4
Condition | NA | 50% (7/14) condition outcomes
Decision | NA | 50% (2/4) decision outcomes
MCDC | NA | 0% (0/4) conditions reversed the outcome
Execution | NA | 100% (16/16) objective outcomes

#### Logic block "Logical"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (2/4) condition outcomes
MCDC | 0% (0/2) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 0 | 101
input port 2 | 101 | 0

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | (TT) | FT
input port 2 | (TT) | (TF)

#### Logic block "Logical1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (2/4) condition outcomes
MCDC | 0% (0/2) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 101 | 0
input port 2 | 101 | 0

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | TT | (FT)
input port 2 | TT | (TF)

#### RelationalOperator block "Comparison"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 > input2 | 0 | 101

#### RelationalOperator block "Comparison1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 < input2 | 101 | 0

#### RelationalOperator block "Comparison2"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### Full Coverage

Model Object | Metric
DataTypeConversion block "Data Type Conversion" | Execution
Constant block "Constant3" | Execution
Constant block "Constant4" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm1" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm10" | Execution

### 13. SubSystem block "LDP_GeLDP_CC2St_enum"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempFltDet/LDP_GeLDP_CC2St_enum
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 14. SubSystem block "LDP_GeLDP_CC2St_enum1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempFltDet/LDP_GeLDP_CC2St_enum1
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 15. SubSystem block "DCChrgPosTempHiFltDet"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag
Child Systems: | LDP_GeLDP_CC2St_enum

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 2
Condition | NA | 50% (8/16) condition outcomes
Decision | NA | 50% (1/2) decision outcomes
MCDC | NA | 0% (0/4) conditions reversed the outcome
Execution | NA | 100% (13/13) objective outcomes

#### Logic block "Logical1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (4/8) condition outcomes
MCDC | 0% (0/4) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 0 | 101
input port 2 | 101 | 0
input port 3 | 0 | 101
input port 4 | 101 | 0

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | (TTTT) | (FTTT)
input port 2 | (TTTT) | (TFTT)
input port 3 | (TTTT) | (TTFT)
input port 4 | (TTTT) | (TTTF)

#### RelationalOperator block "Comparison1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 >= input2 | 101 | 0

#### RelationalOperator block "Comparison2"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### RelationalOperator block "Relational Operator1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 0 | 101

#### RelationalOperator block "Relational Operator3"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 101 | 0

#### Full Coverage

Model Object | Metric
DataTypeConversion block "Data Type Conversion" | Execution
Constant block "Constant1" | Execution
Constant block "Constant3" | Execution
Constant block "Constant4" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm10" | Execution

### 16. SubSystem block "LDP_GeLDP_CC2St_enum"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempHiFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/DCChrgPosTempHiFltDet/LDP_GeLDP_CC2St_enum
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 17. SubSystem block "IntWtTempFltDet"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag
Child Systems: | LDP_GeLDP_CC2St_enum, LDP_GeLDP_CC2St_enum1

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 4
Condition | NA | 75% (3/4) condition outcomes
Decision | NA | 50% (2/4) decision outcomes
Execution | NA | 100% (10/10) objective outcomes

#### RelationalOperator block "Comparison"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 > input2 | 0 | 101

#### Full Coverage

Model Object | Metric
RelationalOperator block "Comparison2" | Condition, Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm1" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm10" | Execution

### 18. SubSystem block "LDP_GeLDP_CC2St_enum"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempFltDet/LDP_GeLDP_CC2St_enum
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 19. SubSystem block "LDP_GeLDP_CC2St_enum1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempFltDet/LDP_GeLDP_CC2St_enum1
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 20. SubSystem block "IntWtTempHiFltDet"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag
Child Systems: | LDP_GeLDP_CC2St_enum

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 2
Condition | NA | 83% (10/12) condition outcomes
Decision | NA | 50% (1/2) decision outcomes
MCDC | NA | 0% (0/3) conditions reversed the outcome
Execution | NA | 100% (10/10) objective outcomes

#### Logic block "Logical1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 83% (5/6) condition outcomes
MCDC | 0% (0/3) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 101 | 0
input port 2 | 61 | 40
input port 3 | 40 | 61

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | (TTT) | (FTT)
input port 2 | (TTT) | TFT
input port 3 | (TTT) | TTF

#### RelationalOperator block "Relational Operator3"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempHiFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 101 | 0

#### Full Coverage

Model Object | Metric
RelationalOperator block "Comparison1" | Condition, Execution
RelationalOperator block "Relational Operator1" | Condition, Execution
Constant block "Constant1" | Execution
Constant block "Constant4" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm10" | Execution

### 21. SubSystem block "LDP_GeLDP_CC2St_enum"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempHiFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempHiFltDet/LDP_GeLDP_CC2St_enum
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 22. SubSystem block "IntWtTempHiFltDet1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag
Child Systems: | LDP_GeLDP_CC2St_enum

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 2
Condition | NA | 83% (10/12) condition outcomes
Decision | NA | 50% (1/2) decision outcomes
MCDC | NA | 0% (0/3) conditions reversed the outcome
Execution | NA | 100% (10/10) objective outcomes

#### Logic block "Logical1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempHiFltDet1
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 83% (5/6) condition outcomes
MCDC | 0% (0/3) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 101 | 0
input port 2 | 61 | 40
input port 3 | 40 | 61

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | (TTT) | (FTT)
input port 2 | (TTT) | TFT
input port 3 | (TTT) | TTF

#### RelationalOperator block "Relational Operator3"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempHiFltDet1
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 101 | 0

#### Full Coverage

Model Object | Metric
RelationalOperator block "Comparison1" | Condition, Execution
RelationalOperator block "Relational Operator1" | Condition, Execution
Constant block "Constant1" | Execution
Constant block "Constant4" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm10" | Execution

### 23. SubSystem block "LDP_GeLDP_CC2St_enum"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempHiFltDet1

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/IntWtTempHiFltDet1/LDP_GeLDP_CC2St_enum
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 24. SubSystem block "LDP_GbLDP_CC2STG_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/LDP_GbLDP_CC2STG_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 2/2
true (output is from 1st input port) | 0/2

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 25. SubSystem block "LDP_GbLDP_CC2STG_flg1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/LDP_GbLDP_CC2STG_flg1
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 2/2
true (output is from 1st input port) | 0/2

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 26. SubSystem block "LDP_GbLDP_CC2VoltRaty_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/LDP_GbLDP_CC2VoltRaty_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 2/2
true (output is from 1st input port) | 0/2

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 27. SubSystem block "LDP_GbLDP_DCPlugNegTempSTGFlt_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/LDP_GbLDP_DCPlugNegTempSTGFlt_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 2/2
true (output is from 1st input port) | 0/2

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 28. SubSystem block "LDP_GbLDP_DCPlugNegTempSTVFlt_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/LDP_GbLDP_DCPlugNegTempSTVFlt_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 2/2
true (output is from 1st input port) | 0/2

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 29. SubSystem block "LDP_GbLDP_DCPlugPosTempSTGFlt_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/LDP_GbLDP_DCPlugPosTempSTGFlt_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 2/2
true (output is from 1st input port) | 0/2

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 30. SubSystem block "LDP_GbLDP_DCPlugPosTempSTVFlt_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/LDP_GbLDP_DCPlugPosTempSTVFlt_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 2/2
true (output is from 1st input port) | 0/2

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 31. SubSystem block "LDP_GeLDP_DCPlugTempState_enum"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/LDP_GeLDP_DCPlugTempState_enum
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 2/2
true (output is from 1st input port) | 0/2

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 32. SubSystem block "OutWtTempFltDet"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag
Child Systems: | LDP_GeLDP_CC2St_enum, LDP_GeLDP_CC2St_enum1

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 4
Condition | NA | 75% (3/4) condition outcomes
Decision | NA | 50% (2/4) decision outcomes
Execution | NA | 100% (10/10) objective outcomes

#### RelationalOperator block "Comparison"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/OutWtTempFltDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 > input2 | 0 | 101

#### Full Coverage

Model Object | Metric
RelationalOperator block "Comparison2" | Condition, Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm1" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm10" | Execution

### 33. SubSystem block "LDP_GeLDP_CC2St_enum"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/OutWtTempFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/OutWtTempFltDet/LDP_GeLDP_CC2St_enum
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 34. SubSystem block "LDP_GeLDP_CC2St_enum1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/OutWtTempFltDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalDiag/OutWtTempFltDet/LDP_GeLDP_CC2St_enum1
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 35. SubSystem block "LowVoltSignalProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys

Child Systems:

BmuSplyVoltProc, CC2StateDet, CC2VoltProc, ChrgNegHsdCrntProc, ChrgNegHsdVoltProc, ChrgNegTempProc, ChrgPosHsdCrntProc, ChrgPosHsdVoltProc, ChrgPosTempProc, CrntSensVoltProc, CshFbkProc, CshOutProc, DCSuplyVoltProc, DCSupplyStateDet, HallSplyVoltProc, HvilFbkProc, HvilOutProc, Kl30CVoltProc, Kl30VoltProc, NegHsdCrntProc, NegHsdVoltProc, OutWtSensVoltProc, PosHsdCrntProc, PosHsdVoltProc, lntWtSensVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 160
Condition | NA | 73% (32/44) condition outcomes
Decision | NA | 59% (123/208) decision outcomes
MCDC | NA | 20% (1/5) conditions reversed the outcome
Execution | NA | 93% (330/353) objective outcomes

### 36. SubSystem block "BmuSplyVoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_BmuSplyVoltVld_flg, LDP_GcLDP_BmuSplyVolt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch15" | Decision, Execution
DataTypeConversion block "Data Type Conversion15" | Execution
UnitDelay block "Unit Delay15" | Execution

### 37. SubSystem block "LDP_GbLDP_BmuSplyVoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/BmuSplyVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/BmuSplyVoltProc/LDP_GbLDP_BmuSplyVoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 38. SubSystem block "LDP_GcLDP_BmuSplyVolt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/BmuSplyVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/BmuSplyVoltProc/LDP_GcLDP_BmuSplyVolt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 39. SubSystem block "CC2StateDet"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | BMSDebounceStartZero, LDP_GeLDP_CC2St_enum

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 17
Condition | NA | 82% (18/22) condition outcomes
Decision | NA | 67% (20/30) decision outcomes
MCDC | NA | 33% (1/3) conditions reversed the outcome
Execution | NA | 96% (54/56) objective outcomes

#### Logic block "Logical Operator1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 83% (5/6) condition outcomes
MCDC | 33% (1/3) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 21 | 80
input port 2 | 101 | 0
input port 3 | 41 | 60

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | TTT | FTT
input port 2 | TTT | (TFT)
input port 3 | TTT | (TTF)

#### RelationalOperator block "Relational Operator2"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 <= input2 | 101 | 0

#### Full Coverage

Model Object | Metric
Switch block "Switch" | Decision, Execution
DataTypeConversion block "Data Type Conversion3" | Execution
Product block "Product1" | Execution
Product block "Product2" | Execution
Sum block "Add" | Execution
Sum block "Add2" | Execution
RelationalOperator block "Relational Operator1" | Condition, Execution
Constant block "Constant" | Execution
Constant block "Constant1" | Execution
Constant block "Constant2" | Execution
Constant block "Constant9" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm1" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm2" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm3" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm4" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm5" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm6" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm7" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm8" | Execution

### 40. SubSystem block "BMSDebounceStartZero"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet
Child Systems: | Compare To Zero, FaultProcess, HealProcess

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 14
Condition | NA | 83% (10/12) condition outcomes
Decision | NA | 65% (17/26) decision outcomes
Execution | NA | 94% (30/32) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 0/101
true (output is from 1st input port) | 101/101

#### Full Coverage

Model Object | Metric
UnitDelay block "Unit Delay" | Execution

### 41. SubSystem block "Compare To Zero"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 0
Condition | NA | 50% (1/2) condition outcomes
Execution | NA | 100% (1/1) objective outcomes

#### RelationalOperator block "Compare"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/Compare To Zero
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 101 | 0

### 42. SubSystem block "FaultProcess"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero
Child Systems: | Decrease, Increase

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 6
Condition | NA | 75% (3/4) condition outcomes
Decision | NA | 67% (8/12) decision outcomes
Execution | NA | 93% (13/14) objective outcomes

#### Switch block "Switch2"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/FaultProcess
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Switch block "Switch" | Decision, Execution
Switch block "Switch1" | Decision, Execution
RelationalOperator block "Relational Operator" | Condition, Execution
Constant block "Constant" | Execution
Constant block "Constant1" | Execution
UnitDelay block "Unit Delay" | Execution
UnitDelay block "Unit Delay1" | Execution

### 43. SubSystem block "Decrease"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/FaultProcess
Child Systems: | Nomal

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 1
Condition | NA | 50% (1/2) condition outcomes
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 75% (3/4) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/FaultProcess/Decrease
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 80/80
true (output is from 1st input port) | 0/80

#### RelationalOperator block "Relational Operator"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/FaultProcess/Decrease
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 >= input2 | 0 | 80

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution

### 44. SubSystem block "Nomal"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/FaultProcess/Decrease

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 0
Execution | NA | 0% (0/1) objective outcomes

#### Sum block "Add"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/FaultProcess/Decrease/Nomal
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

### 45. SubSystem block "Increase"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/FaultProcess

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 2
Decision | NA | 50% (2/4) decision outcomes
Execution | NA | 100% (2/2) objective outcomes

#### Saturate block "Saturation"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/FaultProcess/Increase
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 2
Decision | 50% (2/4) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

input > lower limit | 50%
false | 0/21
true | 21/21
input >= upper limit | 50%
false | 21/21
true | 0/21

#### Full Coverage

Model Object | Metric
Sum block "Add" | Execution

### 46. SubSystem block "HealProcess"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero
Child Systems: | Compare To Zero, Decrease, Increase

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 6
Condition | NA | 100% (6/6) condition outcomes
Decision | NA | 67% (8/12) decision outcomes
Execution | NA | 93% (14/15) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/HealProcess
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 0% (0/2) decision outcomes
Execution | 0% (0/1) objective outcomes

Decisions analyzed

logical trigger input | 0%
false (output is from 3rd input port) | --
true (output is from 1st input port) | --

#### Full Coverage

Model Object | Metric
Switch block "Switch1" | Decision, Execution
Switch block "Switch2" | Decision, Execution
RelationalOperator block "Relational Operator" | Condition, Execution
Constant block "Constant" | Execution
Constant block "Constant1" | Execution
UnitDelay block "Unit Delay1" | Execution
UnitDelay block "Unit Delay2" | Execution

### 47. SubSystem block "Compare To Zero"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/HealProcess

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 0
Condition | NA | 100% (2/2) condition outcomes
Execution | NA | 100% (1/1) objective outcomes

#### Full Coverage

Model Object | Metric
RelationalOperator block "Compare" | Condition, Execution

### 48. SubSystem block "Decrease"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/HealProcess
Child Systems: | Nomal

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 1
Condition | NA | 100% (2/2) condition outcomes
Decision | NA | 100% (2/2) decision outcomes
Execution | NA | 100% (4/4) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch" | Decision, Execution
RelationalOperator block "Relational Operator" | Condition, Execution
Constant block "Constant" | Execution

### 49. SubSystem block "Nomal"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/HealProcess/Decrease

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 0
Execution | NA | 100% (1/1) objective outcomes

#### Full Coverage

Model Object | Metric
Sum block "Add" | Execution

### 50. SubSystem block "Increase"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/HealProcess

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 2
Decision | NA | 50% (2/4) decision outcomes
Execution | NA | 100% (2/2) objective outcomes

#### Saturate block "Saturation"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/BMSDebounceStartZero/HealProcess/Increase
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 2
Decision | 50% (2/4) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

input > lower limit | 50%
false | 0/80
true | 80/80
input >= upper limit | 50%
false | 80/80
true | 0/80

#### Full Coverage

Model Object | Metric
Sum block "Add" | Execution

### 51. SubSystem block "LDP_GeLDP_CC2St_enum"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2StateDet/LDP_GeLDP_CC2St_enum
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 52. SubSystem block "CC2VoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_CC2VoltVld_flg, LDP_GcLDP_CC2Volt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (11/11) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch3" | Decision, Execution
DataTypeConversion block "Data Type Conversion1" | Execution
DataTypeConversion block "Data Type Conversion2" | Execution
DataTypeConversion block "Data Type Conversion3" | Execution
UnitDelay block "Unit Delay3" | Execution

### 53. SubSystem block "LDP_GbLDP_CC2VoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2VoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2VoltProc/LDP_GbLDP_CC2VoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 54. SubSystem block "LDP_GcLDP_CC2Volt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2VoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CC2VoltProc/LDP_GcLDP_CC2Volt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 55. SubSystem block "ChrgNegHsdCrntProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_ChrgNegHsdCrntVld_flg, LDP_GcLDP_ChrgNegHsdCrnt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch12" | Decision, Execution
DataTypeConversion block "Data Type Conversion12" | Execution
UnitDelay block "Unit Delay12" | Execution

### 56. SubSystem block "LDP_GbLDP_ChrgNegHsdCrntVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegHsdCrntProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegHsdCrntProc/LDP_GbLDP_ChrgNegHsdCrntVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 57. SubSystem block "LDP_GcLDP_ChrgNegHsdCrnt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegHsdCrntProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegHsdCrntProc/LDP_GcLDP_ChrgNegHsdCrnt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 58. SubSystem block "ChrgNegHsdVoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_ChrgNegHsdVoltVld_flg, LDP_GcLDP_ChrgNegHsdVolt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch14" | Decision, Execution
DataTypeConversion block "Data Type Conversion14" | Execution
UnitDelay block "Unit Delay14" | Execution

### 59. SubSystem block "LDP_GbLDP_ChrgNegHsdVoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegHsdVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegHsdVoltProc/LDP_GbLDP_ChrgNegHsdVoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 60. SubSystem block "LDP_GcLDP_ChrgNegHsdVolt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegHsdVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegHsdVoltProc/LDP_GcLDP_ChrgNegHsdVolt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 61. SubSystem block "ChrgNegTempProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_ChrgNegTempVld_flg, LDP_GcLDP_ChrgNegTemp_mV, LDP_GcLDP_ChrgNegTemp_mV1

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 7
Decision | NA | 50% (4/8) decision outcomes
Execution | NA | 93% (13/14) objective outcomes

#### Switch block "Switch18"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegTempProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### DataTypeConversion block "Data Type Conversion18"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegTempProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### Full Coverage

Model Object | Metric
Lookup_n-D block "1-D Lookup Table" | Execution
DataTypeConversion block "Data Type Conversion1" | Execution
UnitDelay block "Unit Delay18" | Execution

### 62. SubSystem block "LDP_GbLDP_ChrgNegTempVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegTempProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegTempProc/LDP_GbLDP_ChrgNegTempVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 63. SubSystem block "LDP_GcLDP_ChrgNegTemp_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegTempProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegTempProc/LDP_GcLDP_ChrgNegTemp_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 64. SubSystem block "LDP_GcLDP_ChrgNegTemp_mV1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegTempProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgNegTempProc/LDP_GcLDP_ChrgNegTemp_mV1
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 65. SubSystem block "ChrgPosHsdCrntProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_ChrgPosHsdCrntVld_flg, LDP_GcLDP_ChrgPosHsdCrnt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch8" | Decision, Execution
DataTypeConversion block "Data Type Conversion8" | Execution
UnitDelay block "Unit Delay8" | Execution

### 66. SubSystem block "LDP_GbLDP_ChrgPosHsdCrntVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosHsdCrntProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosHsdCrntProc/LDP_GbLDP_ChrgPosHsdCrntVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 67. SubSystem block "LDP_GcLDP_ChrgPosHsdCrnt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosHsdCrntProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosHsdCrntProc/LDP_GcLDP_ChrgPosHsdCrnt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 68. SubSystem block "ChrgPosHsdVoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_ChrgPosHsdVoltVld_flg, LDP_GcLDP_ChrgPosHsdVolt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch13" | Decision, Execution
DataTypeConversion block "Data Type Conversion13" | Execution
UnitDelay block "Unit Delay13" | Execution

### 69. SubSystem block "LDP_GbLDP_ChrgPosHsdVoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosHsdVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosHsdVoltProc/LDP_GbLDP_ChrgPosHsdVoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 70. SubSystem block "LDP_GcLDP_ChrgPosHsdVolt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosHsdVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosHsdVoltProc/LDP_GcLDP_ChrgPosHsdVolt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 71. SubSystem block "ChrgPosTempProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_ChrgPosTempVld_flg, LDP_GcLDP_ChrgNegTemp_mV1, LDP_GcLDP_ChrgPosTemp_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 7
Decision | NA | 50% (4/8) decision outcomes
Execution | NA | 93% (13/14) objective outcomes

#### Switch block "Switch19"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosTempProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### DataTypeConversion block "Data Type Conversion19"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosTempProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### Full Coverage

Model Object | Metric
Lookup_n-D block "1-D Lookup Table" | Execution
DataTypeConversion block "Data Type Conversion1" | Execution
UnitDelay block "Unit Delay19" | Execution

### 72. SubSystem block "LDP_GbLDP_ChrgPosTempVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosTempProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosTempProc/LDP_GbLDP_ChrgPosTempVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 73. SubSystem block "LDP_GcLDP_ChrgNegTemp_mV1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosTempProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosTempProc/LDP_GcLDP_ChrgNegTemp_mV1
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 74. SubSystem block "LDP_GcLDP_ChrgPosTemp_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosTempProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/ChrgPosTempProc/LDP_GcLDP_ChrgPosTemp_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 75. SubSystem block "CrntSensVoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_CrntSensVld_flg, LDP_GcLDP_CrntSens_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Condition | NA | 100% (2/2) condition outcomes
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (11/11) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch1" | Decision, Execution
DataTypeConversion block "Data Type Conversion1" | Execution
RelationalOperator block "Relational Operator2" | Condition, Execution
Constant block "Constant2" | Execution
UnitDelay block "Unit Delay1" | Execution

### 76. SubSystem block "LDP_GbLDP_CrntSensVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CrntSensVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CrntSensVoltProc/LDP_GbLDP_CrntSensVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 77. SubSystem block "LDP_GcLDP_CrntSens_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CrntSensVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CrntSensVoltProc/LDP_GcLDP_CrntSens_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 78. SubSystem block "CshFbkProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GcLDP_CshDutyFbk_pct, LDP_GcLDP_CshPerFbk_us, LDP_GcLDP_CshStFbk_numb

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 7
Decision | NA | 50% (4/8) decision outcomes
Execution | NA | 81% (13/16) objective outcomes

#### Switch block "Switch23"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshFbkProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### DataTypeConversion block "Data Type Conversion29"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshFbkProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### DataTypeConversion block "Data Type Conversion30"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshFbkProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### DataTypeConversion block "Data Type Conversion31"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshFbkProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### Full Coverage

Model Object | Metric
UnitDelay block "Unit Delay24" | Execution
UnitDelay block "Unit Delay25" | Execution
UnitDelay block "Unit Delay26" | Execution

### 79. SubSystem block "LDP_GcLDP_CshDutyFbk_pct"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshFbkProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshFbkProc/LDP_GcLDP_CshDutyFbk_pct
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 80. SubSystem block "LDP_GcLDP_CshPerFbk_us"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshFbkProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshFbkProc/LDP_GcLDP_CshPerFbk_us
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 81. SubSystem block "LDP_GcLDP_CshStFbk_numb"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshFbkProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshFbkProc/LDP_GcLDP_CshStFbk_numb
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 82. SubSystem block "CshOutProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GcLDP_CshDutyOut_pct, LDP_GcLDP_CshPerOut_us, LDP_GcLDP_CshSt_numb

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 7
Decision | NA | 50% (4/8) decision outcomes
Execution | NA | 81% (13/16) objective outcomes

#### Switch block "Switch21"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshOutProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### DataTypeConversion block "Data Type Conversion23"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshOutProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### DataTypeConversion block "Data Type Conversion24"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshOutProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### DataTypeConversion block "Data Type Conversion25"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshOutProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### Full Coverage

Model Object | Metric
UnitDelay block "Unit Delay22" | Execution
UnitDelay block "Unit Delay29" | Execution
UnitDelay block "Unit Delay30" | Execution

### 83. SubSystem block "LDP_GcLDP_CshDutyOut_pct"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshOutProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshOutProc/LDP_GcLDP_CshDutyOut_pct
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 84. SubSystem block "LDP_GcLDP_CshPerOut_us"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshOutProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshOutProc/LDP_GcLDP_CshPerOut_us
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 85. SubSystem block "LDP_GcLDP_CshSt_numb"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshOutProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/CshOutProc/LDP_GcLDP_CshSt_numb
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 86. SubSystem block "DCSuplyVoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_DCSuplyVoltVld_flg, LDP_GcLDP_DCSuplyVolt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (11/11) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch4" | Decision, Execution
DataTypeConversion block "Data Type Conversion1" | Execution
DataTypeConversion block "Data Type Conversion2" | Execution
DataTypeConversion block "Data Type Conversion4" | Execution
UnitDelay block "Unit Delay4" | Execution

### 87. SubSystem block "LDP_GbLDP_DCSuplyVoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSuplyVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSuplyVoltProc/LDP_GbLDP_DCSuplyVoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 88. SubSystem block "LDP_GcLDP_DCSuplyVolt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSuplyVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSuplyVoltProc/LDP_GcLDP_DCSuplyVolt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 89. SubSystem block "DCSupplyStateDet"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | BMSDebounceStartZero1, LDP_GbLDP_DC12VSply_flg

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 16
Condition | NA | 60% (12/20) condition outcomes
Decision | NA | 39% (11/28) decision outcomes
MCDC | NA | 0% (0/2) conditions reversed the outcome
Execution | NA | 84% (37/44) objective outcomes

#### Logic block "Logical Operator2"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 75% (3/4) condition outcomes
MCDC | 0% (0/2) conditions reversed the outcome
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input port 1 | 0 | 101
input port 2 | 41 | 60

MC/DC analysis (combinations in parentheses did not occur)

Decision/Condition | True Out | False Out
expression for output |
input port 1 | (TT) | FT
input port 2 | (TT) | (TF)

#### RelationalOperator block "Relational Operator3"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 >= input2 | 0 | 101

#### Full Coverage

Model Object | Metric
RelationalOperator block "Relational Operator4" | Condition, Execution
Constant block "Constant1" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm10" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm2" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm3" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm6" | Execution
Constant block "KeMDPR_t_EngChrgBatIdleMinSetTm9" | Execution

### 90. SubSystem block "BMSDebounceStartZero1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet
Child Systems: | Compare To Zero, FaultProcess, HealProcess

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 14
Condition | NA | 50% (6/12) condition outcomes
Decision | NA | 38% (10/26) decision outcomes
Execution | NA | 78% (25/32) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 0/101
true (output is from 1st input port) | 101/101

#### Full Coverage

Model Object | Metric
UnitDelay block "Unit Delay" | Execution

### 91. SubSystem block "Compare To Zero"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 0
Condition | NA | 50% (1/2) condition outcomes
Execution | NA | 100% (1/1) objective outcomes

#### RelationalOperator block "Compare"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/Compare To Zero
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 101 | 0

### 92. SubSystem block "FaultProcess"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1
Child Systems: | Decrease, Increase

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 6
Condition | NA | 50% (2/4) condition outcomes
Decision | NA | 33% (4/12) decision outcomes
Execution | NA | 79% (11/14) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Switch block "Switch1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Switch block "Switch2"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### RelationalOperator block "Relational Operator"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 > input2 | 0 | 101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution
UnitDelay block "Unit Delay" | Execution
UnitDelay block "Unit Delay1" | Execution

### 93. SubSystem block "Decrease"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess
Child Systems: | Nomal

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 1
Condition | NA | 50% (1/2) condition outcomes
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 75% (3/4) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess/Decrease
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### RelationalOperator block "Relational Operator"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess/Decrease
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 >= input2 | 0 | 101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution

### 94. SubSystem block "Nomal"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess/Decrease

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 0
Execution | NA | 0% (0/1) objective outcomes

#### Sum block "Add"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess/Decrease/Nomal
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

### 95. SubSystem block "Increase"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 2
Decision | NA | 0% (0/4) decision outcomes
Execution | NA | 0% (0/2) objective outcomes

#### Saturate block "Saturation"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess/Increase
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 2
Decision | 0% (0/4) decision outcomes
Execution | 0% (0/1) objective outcomes

Decisions analyzed

input > lower limit | 0%
false | --
true | --
input >= upper limit | 0%
false | --
true | --

#### Sum block "Add"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/FaultProcess/Increase
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

### 96. SubSystem block "HealProcess"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1
Child Systems: | Compare To Zero, Decrease, Increase

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 6
Condition | NA | 50% (3/6) condition outcomes
Decision | NA | 42% (5/12) decision outcomes
Execution | NA | 73% (11/15) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 0% (0/2) decision outcomes
Execution | 0% (0/1) objective outcomes

Decisions analyzed

logical trigger input | 0%
false (output is from 3rd input port) | --
true (output is from 1st input port) | --

#### Switch block "Switch1"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 0/101
true (output is from 1st input port) | 101/101

#### Full Coverage

Model Object | Metric
Switch block "Switch2" | Decision, Execution
RelationalOperator block "Relational Operator" | Condition, Execution
Constant block "Constant" | Execution
Constant block "Constant1" | Execution
UnitDelay block "Unit Delay1" | Execution
UnitDelay block "Unit Delay2" | Execution

### 97. SubSystem block "Compare To Zero"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 0
Condition | NA | 50% (1/2) condition outcomes
Execution | NA | 100% (1/1) objective outcomes

#### RelationalOperator block "Compare"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess/Compare To Zero
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 50% (1/2) condition outcomes
Execution | 100% (1/1) objective outcomes

Conditions analyzed

Description | True | False
input1 == input2 | 101 | 0

### 98. SubSystem block "Decrease"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess
Child Systems: | Nomal

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 1
Condition | NA | 0% (0/2) condition outcomes
Decision | NA | 0% (0/2) decision outcomes
Execution | NA | 25% (1/4) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess/Decrease
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 0% (0/2) decision outcomes
Execution | 0% (0/1) objective outcomes

Decisions analyzed

logical trigger input | 0%
false (output is from 3rd input port) | --
true (output is from 1st input port) | --

#### RelationalOperator block "Relational Operator"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess/Decrease
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Condition | 0% (0/2) condition outcomes
Execution | 0% (0/1) objective outcomes

Conditions analyzed

Description | True | False
input1 >= input2 | 0 | 0

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution

### 99. SubSystem block "Nomal"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess/Decrease

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 0
Execution | NA | 0% (0/1) objective outcomes

#### Sum block "Add"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess/Decrease/Nomal
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

### 100. SubSystem block "Increase"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 2
Decision | NA | 50% (2/4) decision outcomes
Execution | NA | 100% (2/2) objective outcomes

#### Saturate block "Saturation"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/BMSDebounceStartZero1/HealProcess/Increase
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 2
Decision | 50% (2/4) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

input > lower limit | 50%
false | 0/101
true | 101/101
input >= upper limit | 50%
false | 101/101
true | 0/101

#### Full Coverage

Model Object | Metric
Sum block "Add" | Execution

### 101. SubSystem block "LDP_GbLDP_DC12VSply_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/DCSupplyStateDet/LDP_GbLDP_DC12VSply_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 102. SubSystem block "HallSplyVoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_HallSplyVoltVld_flg, LDP_GcLDP_HallSplyVolt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch2" | Decision, Execution
DataTypeConversion block "Data Type Conversion2" | Execution
UnitDelay block "Unit Delay2" | Execution

### 103. SubSystem block "LDP_GbLDP_HallSplyVoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HallSplyVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HallSplyVoltProc/LDP_GbLDP_HallSplyVoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 104. SubSystem block "LDP_GcLDP_HallSplyVolt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HallSplyVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HallSplyVoltProc/LDP_GcLDP_HallSplyVolt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 105. SubSystem block "HvilFbkProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GcLDP_HvilDutyFbkt_pct, LDP_GcLDP_HvilPerFbk_us, LDP_GcLDP_HvilStFbk_numb

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 7
Decision | NA | 50% (4/8) decision outcomes
Execution | NA | 81% (13/16) objective outcomes

#### Switch block "Switch22"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilFbkProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### DataTypeConversion block "Data Type Conversion26"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilFbkProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### DataTypeConversion block "Data Type Conversion27"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilFbkProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### DataTypeConversion block "Data Type Conversion28"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilFbkProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### Full Coverage

Model Object | Metric
UnitDelay block "Unit Delay23" | Execution
UnitDelay block "Unit Delay27" | Execution
UnitDelay block "Unit Delay28" | Execution

### 106. SubSystem block "LDP_GcLDP_HvilDutyFbkt_pct"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilFbkProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilFbkProc/LDP_GcLDP_HvilDutyFbkt_pct
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 107. SubSystem block "LDP_GcLDP_HvilPerFbk_us"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilFbkProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilFbkProc/LDP_GcLDP_HvilPerFbk_us
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 108. SubSystem block "LDP_GcLDP_HvilStFbk_numb"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilFbkProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilFbkProc/LDP_GcLDP_HvilStFbk_numb
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 109. SubSystem block "HvilOutProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GcLDP_HvilDutyOut_pct, LDP_GcLDP_HvilPerOut_us, LDP_GcLDP_HvilSt_numb

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 7
Decision | NA | 50% (4/8) decision outcomes
Execution | NA | 81% (13/16) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilOutProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### DataTypeConversion block "Data Type Conversion20"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilOutProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### DataTypeConversion block "Data Type Conversion21"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilOutProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### DataTypeConversion block "Data Type Conversion22"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilOutProc
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 0
Execution | 0% (0/1) objective outcomes

#### Full Coverage

Model Object | Metric
UnitDelay block "Unit Delay21" | Execution
UnitDelay block "Unit Delay31" | Execution
UnitDelay block "Unit Delay32" | Execution

### 110. SubSystem block "LDP_GcLDP_HvilDutyOut_pct"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilOutProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilOutProc/LDP_GcLDP_HvilDutyOut_pct
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 111. SubSystem block "LDP_GcLDP_HvilPerOut_us"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilOutProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilOutProc/LDP_GcLDP_HvilPerOut_us
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 112. SubSystem block "LDP_GcLDP_HvilSt_numb"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilOutProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/HvilOutProc/LDP_GcLDP_HvilSt_numb
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 113. SubSystem block "Kl30CVoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_Kl30CVoltVld_flg, LDP_GcLDP_Kl30CVolt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch5" | Decision, Execution
DataTypeConversion block "Data Type Conversion5" | Execution
UnitDelay block "Unit Delay5" | Execution

### 114. SubSystem block "LDP_GbLDP_Kl30CVoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/Kl30CVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/Kl30CVoltProc/LDP_GbLDP_Kl30CVoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 115. SubSystem block "LDP_GcLDP_Kl30CVolt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/Kl30CVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/Kl30CVoltProc/LDP_GcLDP_Kl30CVolt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 116. SubSystem block "Kl30VoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_Kl30VoltVld_flg, LDP_GcLDP_Kl30Volt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch6" | Decision, Execution
DataTypeConversion block "Data Type Conversion6" | Execution
UnitDelay block "Unit Delay6" | Execution

### 117. SubSystem block "LDP_GbLDP_Kl30VoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/Kl30VoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/Kl30VoltProc/LDP_GbLDP_Kl30VoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 118. SubSystem block "LDP_GcLDP_Kl30Volt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/Kl30VoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/Kl30VoltProc/LDP_GcLDP_Kl30Volt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 119. SubSystem block "NegHsdCrntProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_NegHsdCrntVld_flg, LDP_GcLDP_NegHsdCrnt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch9" | Decision, Execution
DataTypeConversion block "Data Type Conversion9" | Execution
UnitDelay block "Unit Delay9" | Execution

### 120. SubSystem block "LDP_GbLDP_NegHsdCrntVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/NegHsdCrntProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/NegHsdCrntProc/LDP_GbLDP_NegHsdCrntVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 121. SubSystem block "LDP_GcLDP_NegHsdCrnt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/NegHsdCrntProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/NegHsdCrntProc/LDP_GcLDP_NegHsdCrnt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 122. SubSystem block "NegHsdVoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_NegHsdVoltVld_flg, LDP_GcLDP_NegHsdVolt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch11" | Decision, Execution
DataTypeConversion block "Data Type Conversion11" | Execution
UnitDelay block "Unit Delay11" | Execution

### 123. SubSystem block "LDP_GbLDP_NegHsdVoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/NegHsdVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/NegHsdVoltProc/LDP_GbLDP_NegHsdVoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 124. SubSystem block "LDP_GcLDP_NegHsdVolt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/NegHsdVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/NegHsdVoltProc/LDP_GcLDP_NegHsdVolt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 125. SubSystem block "OutWtSensVoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_OutWtSensVoltVld_flg, LDP_GcLDP_OutWtTemp_C

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (10/10) objective outcomes

#### Full Coverage

Model Object | Metric
Lookup_n-D block "1-D Lookup Table3" | Execution
Switch block "Switch17" | Decision, Execution
DataTypeConversion block "Data Type Conversion17" | Execution
UnitDelay block "Unit Delay17" | Execution

### 126. SubSystem block "LDP_GbLDP_OutWtSensVoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/OutWtSensVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/OutWtSensVoltProc/LDP_GbLDP_OutWtSensVoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 127. SubSystem block "LDP_GcLDP_OutWtTemp_C"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/OutWtSensVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/OutWtSensVoltProc/LDP_GcLDP_OutWtTemp_C
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 128. SubSystem block "PosHsdCrntProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_PosHsdCrntVld_flg, LDP_GcLDP_PosHsdCrnt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch7" | Decision, Execution
DataTypeConversion block "Data Type Conversion7" | Execution
UnitDelay block "Unit Delay7" | Execution

### 129. SubSystem block "LDP_GbLDP_PosHsdCrntVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/PosHsdCrntProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/PosHsdCrntProc/LDP_GbLDP_PosHsdCrntVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 130. SubSystem block "LDP_GcLDP_PosHsdCrnt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/PosHsdCrntProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/PosHsdCrntProc/LDP_GcLDP_PosHsdCrnt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 131. SubSystem block "PosHsdVoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_PosHsdVoltVld_flg, LDP_GcLDP_PosHsdVolt_mV

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (9/9) objective outcomes

#### Full Coverage

Model Object | Metric
Switch block "Switch10" | Decision, Execution
DataTypeConversion block "Data Type Conversion10" | Execution
UnitDelay block "Unit Delay10" | Execution

### 132. SubSystem block "LDP_GbLDP_PosHsdVoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/PosHsdVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/PosHsdVoltProc/LDP_GbLDP_PosHsdVoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 133. SubSystem block "LDP_GcLDP_PosHsdVolt_mV"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/PosHsdVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/PosHsdVoltProc/LDP_GcLDP_PosHsdVolt_mV
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 134. SubSystem block "lntWtSensVoltProc"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc
Child Systems: | LDP_GbLDP_lntWtSensVoltVld_flg, LDP_GcLDP_lntWtTemp_C

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 0 | 5
Decision | NA | 67% (4/6) decision outcomes
Execution | NA | 100% (10/10) objective outcomes

#### Full Coverage

Model Object | Metric
Lookup_n-D block "1-D Lookup Table2" | Execution
Switch block "Switch16" | Decision, Execution
DataTypeConversion block "Data Type Conversion16" | Execution
UnitDelay block "Unit Delay16" | Execution

### 135. SubSystem block "LDP_GbLDP_lntWtSensVoltVld_flg"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/lntWtSensVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/lntWtSensVoltProc/LDP_GbLDP_lntWtSensVoltVld_flg
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution

### 136. SubSystem block "LDP_GcLDP_lntWtTemp_C"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/lntWtSensVoltProc

Metric | Coverage (this object) | Coverage (inc. descendants)
Cyclomatic Complexity | 1 | 2
Decision | NA | 50% (1/2) decision outcomes
Execution | NA | 100% (3/3) objective outcomes

#### Switch block "Switch"

Justify or Exclude

Parent: | LDP_UT/LowVolyPrc_10ms_sys/LowVoltSignalProc/lntWtSensVoltProc/LDP_GcLDP_lntWtTemp_C
Uncovered Links: |

Metric | Coverage
Cyclomatic Complexity | 1
Decision | 50% (1/2) decision outcomes
Execution | 100% (1/1) objective outcomes

Decisions analyzed

logical trigger input | 50%
false (output is from 3rd input port) | 101/101
true (output is from 1st input port) | 0/101

#### Full Coverage

Model Object | Metric
Constant block "Constant" | Execution
Constant block "Constant1" | Execution