/*
 * File: BSPR_DChrgTempSnsrDiag_parameters.c
 *
 * Code generated for Simulink model 'BSPR_DChrgTempSnsrDiag'.
 *
 * Model version                  : 1.108F
 * Simulink Coder version         : 8.11F (R2016b) 25-Aug-2016
 * C/C++ source code generated on : Wed Dec 19 17:21:13 2018
 *
 * Target selection: ert.tlc
 * Embedded hardware selection: Infineon->TriCore
 * Code generation objectives:
 *    1. MISRA C:2012 guidelines
 *    2. Execution efficiency
 * Validation result: Not run
 */

#include "rtwtypes.h"
#include "BSPR_DChrgTempSnsrDiag_types.h"

/* Exported data definition */
#define ASW1_OEM_START_SEC_DEFAULT_CALIB_UNSPECIFIED
#include "Asw1_OEM_MemMap.h"

/* Definition for custom storage class: Const */
const volatile uint8_T BCCR_cntDChrgTempDiag_CW = 255U;
const volatile real32_T BSPR_tiDChrgTNegElecMax_C = 2.0F;
const volatile real32_T BSPR_tiDChrgTNegElecMin_C = 2.0F;
const volatile real32_T BSPR_tiDChrgTNegJit_C = 2.0F;
const volatile real32_T BSPR_tiDChrgTNegVld_C = 2.0F;
const volatile real32_T BSPR_tiDChrgTPosElecMax_C = 2.0F;
const volatile real32_T BSPR_tiDChrgTPosElecMin_C = 2.0F;
const volatile real32_T BSPR_tiDChrgTPosJit_C = 2.0F;
const volatile real32_T BSPR_tiDChrgTPosVld_C = 2.0F;
const volatile real32_T BSPR_uDChrgTNegElecMax_C = 4.9F;
const volatile real32_T BSPR_uDChrgTNegElecMin_C = 0.1F;
const volatile real32_T BSPR_uDChrgTNegJitDiff_C = 1.0F;
const volatile real32_T BSPR_uDChrgTPosElecMax_C = 4.9F;
const volatile real32_T BSPR_uDChrgTPosElecMin_C = 0.1F;
const volatile real32_T BSPR_uDChrgTPosJitDiff_C = 1.0F;

#define ASW1_OEM_STOP_SEC_DEFAULT_CALIB_UNSPECIFIED
#include "Asw1_OEM_MemMap.h"

/*
 * File trailer for generated code.
 *
 * [EOF]
 */
