/*
 * File: HVSR_FuseChk.c
 *
 * Code generated for Simulink model 'HVSR_FuseChk'.
 *
 * Model version                  : 1.151
 * Simulink Coder version         : 8.11 (R2016b) 25-Aug-2016
 * C/C++ source code generated on : Thu Sep 03 20:03:04 2020
 *
 * Target selection: ert.tlc
 * Embedded hardware selection: Infineon->TriCore
 * Code generation objectives:
 *    1. MISRA C:2012 guidelines
 *    2. Execution efficiency
 * Validation result: Not run
 */

#include "HVSR_FuseChk.h"
#include "HVSR_FuseChk_private.h"

/* Exported data definition */

/* Volatile memory section */
/* Definition for custom storage class: Volatile */
volatile uint8_T DFC_FuseNpl_ASW;

/* Definition for custom storage class: OutputSignal */
volatile boolean_T HVSR_BattVoltVld;
volatile boolean_T HVSR_bBattFuseDiagCond;
volatile boolean_T HVSR_bFuseFaultDet;
volatile boolean_T HVSR_bFuseFaultHeal;
volatile boolean_T HVSR_bKl30FuseDiagCond;
volatile boolean_T HVSR_bSumVoltCellNpl;
volatile boolean_T HVSR_flgBattFuseErrDet;
volatile boolean_T HVSR_flgBattFuseErrHeal;

/* Block states (auto storage) */
DW_HVSR_FuseChk_T HVSR_FuseChk_DW;

/* Model step function */
void HVSR_FuseChk_step(void)
{
  boolean_T rtb_LogicalOperator1;
  boolean_T rtb_LogicalOperator2;
  real32_T rtb_Product_m;
  real32_T rtb_Product_c;
  uint8_T rtb_Switch4;
  real32_T rtb_LogicalOperator1_0;
  rtb_LogicalOperator1 = ((BSPR_uKl30 <= HVSR_uKL30VldHi_C) && (BSPR_uKl30 >=
    HVSR_uKL30VldLo_C));
  if (rtb_LogicalOperator1) {
    rtb_LogicalOperator1_0 = 0.01F;
  } else {
    rtb_LogicalOperator1_0 = 0.0F;
  }

  if (HVSR_tiKL30VldThres_C <= HVSR_FuseChk_DW.Delay_DSTATE_e) {
    rtb_Product_c = HVSR_tiKL30VldThres_C;
  } else {
    rtb_Product_c = HVSR_FuseChk_DW.Delay_DSTATE_e;
  }

  rtb_Product_m = (rtb_LogicalOperator1_0 + rtb_Product_c) * (real32_T)
    rtb_LogicalOperator1;
  HVSR_bKl30FuseDiagCond = (rtb_Product_m > HVSR_tiKL30VldThres_C);
  HVSR_FuseChk_DW.Delay_DSTATE_e = rtb_Product_m;
  HVSR_BattVoltVld = ((!((DFC_BattVoltVld_ASW & 16) == 16)) && ((DFC_BattVoltVld_ASW & 8)
    == 8));
  HVSR_bBattFuseDiagCond = (HVSR_bKl30FuseDiagCond && HVSR_BattVoltVld);
  rtb_Product_m = (real32_T)fabs(BSPR_uReservedSig4 - COMR_uBattVolt);
  rtb_LogicalOperator1 = (HVSR_bBattFuseDiagCond && (rtb_Product_m >=
    HVSR_uBattFuseThresHi_C));
  if (rtb_LogicalOperator1) {
    rtb_LogicalOperator1_0 = 0.01F;
  } else {
    rtb_LogicalOperator1_0 = 0.0F;
  }

  if (HVSR_tiBattFuseDiagThres_C <= HVSR_FuseChk_DW.Delay_DSTATE_c) {
    rtb_Product_c = HVSR_tiBattFuseDiagThres_C;
  } else {
    rtb_Product_c = HVSR_FuseChk_DW.Delay_DSTATE_c;
  }

  rtb_Product_c = (rtb_LogicalOperator1_0 + rtb_Product_c) * (real32_T)
    rtb_LogicalOperator1;
  HVSR_flgBattFuseErrDet = (rtb_Product_c > HVSR_tiBattFuseDiagThres_C);
  HVSR_FuseChk_DW.Delay_DSTATE_c = rtb_Product_c;
  rtb_LogicalOperator1 = ((HVSR_cntFuseDiag_CW & 1) == 1);
  HVSR_bFuseFaultDet = (rtb_LogicalOperator1 && HVSR_flgBattFuseErrDet);
  rtb_LogicalOperator2 = (HVSR_bBattFuseDiagCond && (rtb_Product_m <=
    HVSR_uBattFuseThresLo_C));
  if (rtb_LogicalOperator2) {
    rtb_Product_m = 0.01F;
  } else {
    rtb_Product_m = 0.0F;
  }

  if (HVSR_tiBattFuseDiagThres_C <= HVSR_FuseChk_DW.Delay_DSTATE) {
    rtb_Product_c = HVSR_tiBattFuseDiagThres_C;
  } else {
    rtb_Product_c = HVSR_FuseChk_DW.Delay_DSTATE;
  }

  rtb_Product_m = (rtb_Product_m + rtb_Product_c) * (real32_T)
    rtb_LogicalOperator2;
  HVSR_flgBattFuseErrHeal = (rtb_Product_m > HVSR_tiBattFuseDiagThres_C);
  HVSR_FuseChk_DW.Delay_DSTATE = rtb_Product_m;
  HVSR_bFuseFaultHeal = ((!rtb_LogicalOperator1) || HVSR_flgBattFuseErrHeal);
  if (HVSR_FuseChk_DW.Delay2_DSTATE) {
    rtb_Switch4 = (uint8_T)~(uint8_T)((uint8_T)~DFC_FuseNpl_ASW | 8U);
  } else if (HVSR_bFuseFaultDet) {
    rtb_Switch4 = (uint8_T)(DFC_FuseNpl_ASW | 152U);
  } else if (HVSR_bFuseFaultHeal) {
    rtb_Switch4 = (uint8_T)((uint8_T)~(uint8_T)((uint8_T)~DFC_FuseNpl_ASW | 16U) |
      8U);
  } else {
    rtb_Switch4 = HVSR_FuseChk_DW.Delay3_DSTATE;
  }

  HVSR_FuseChk_DW.Delay2_DSTATE = false;
  HVSR_FuseChk_DW.Delay3_DSTATE = rtb_Switch4;
  DFC_FuseNpl_ASW = rtb_Switch4;
  rtb_LogicalOperator1 = ((BSPR_uSumVoltCell <= HVSR_uSumVoltCellHi_C) &&
    (BSPR_uSumVoltCell >= HVSR_uSumVoltCellLo_C));
  if (rtb_LogicalOperator1) {
    rtb_LogicalOperator1_0 = 0.01F;
  } else {
    rtb_LogicalOperator1_0 = 0.0F;
  }

  if (HVSR_tiKL30VldThres_C <= HVSR_FuseChk_DW.Delay_DSTATE_b) {
    rtb_Product_c = HVSR_tiKL30VldThres_C;
  } else {
    rtb_Product_c = HVSR_FuseChk_DW.Delay_DSTATE_b;
  }

  rtb_Product_m = (rtb_LogicalOperator1_0 + rtb_Product_c) * (real32_T)
    rtb_LogicalOperator1;
  HVSR_bSumVoltCellNpl = (rtb_Product_m > HVSR_tiKL30VldThres_C);
  HVSR_FuseChk_DW.Delay_DSTATE_b = rtb_Product_m;
}

/* Model initialize function */
void HVSR_FuseChk_initialize(void)
{
  /* Registration code */

  /* block I/O */

  /* custom signals */
  HVSR_bFuseFaultDet = false;
  HVSR_bFuseFaultHeal = false;
  HVSR_FuseChk_DW.Delay2_DSTATE = true;
}

/*
 * File trailer for generated code.
 *
 * [EOF]
 */
