/*
 * File: BSPR_DChrgTempSnsrDiag_private.h
 *
 * Code generated for Simulink model 'BSPR_DChrgTempSnsrDiag'.
 *
 * Model version                  : 1.108F
 * Simulink Coder version         : 8.11F (R2016b) 25-Aug-2016
 * C/C++ source code generated on : Wed Dec 19 17:21:13 2018
 *
 * Target selection: ert.tlc
 * Embedded hardware selection: Infineon->TriCore
 * Code generation objectives:
 *    1. MISRA C:2012 guidelines
 *    2. Execution efficiency
 * Validation result: Not run
 */

#ifndef RTW_HEADER_BSPR_DChrgTempSnsrDiag_private_h_
#define RTW_HEADER_BSPR_DChrgTempSnsrDiag_private_h_
#include "rtwtypes.h"

/* Exported data declaration */

/* Declaration for custom storage class: InputSignal */
extern volatile real32_T BSPR_uDChrgNegTemp;
extern volatile real32_T BSPR_uDChrgNegTempFlt;
extern volatile real32_T BSPR_uDChrgPosTemp;
extern volatile real32_T BSPR_uDChrgPosTempFlt;

#endif                                 /* RTW_HEADER_BSPR_DChrgTempSnsrDiag_private_h_ */

/*
 * File trailer for generated code.
 *
 * [EOF]
 */
