/*
 * File: BCMR_AChrg.h
 *
 * Code generated for Simulink model 'BCMR_AChrg'.
 *
 * Model version                  : 1.1156
 * Simulink Coder version         : 8.11 (R2016b) 25-Aug-2016
 * C/C++ source code generated on : Wed Nov 17 17:27:56 2021
 *
 * Target selection: ert.tlc
 * Embedded hardware selection: Infineon->TriCore
 * Code generation objectives:
 *    1. MISRA C:2012 guidelines
 *    2. Execution efficiency
 * Validation result: Not run
 */

#ifndef RTW_HEADER_BCMR_AChrg_h_
#define RTW_HEADER_BCMR_AChrg_h_
#include <math.h>
#include <stddef.h>
#ifndef BCMR_AChrg_COMMON_INCLUDES_
# define BCMR_AChrg_COMMON_INCLUDES_
#include "rtwtypes.h"
#endif                                 /* BCMR_AChrg_COMMON_INCLUDES_ */

#include "BCMR_AChrg_types.h"

/* Includes for objects with custom storage classes. */
#include "achrg_parameters.h"
#include "div_nzp_s32_floor.h"
#include "look1_iflf_binlcapw.h"
#include "look2_iflf_binlcapw.h"

/* Macros for accessing real-time model data structure */

/* user code (top of header file) */
#include "ASW_Interface.h"

/* Block signals for system '<S105>/BMSDebounceStartZero' */
typedef struct {
  boolean_T Switch;                    /* '<S111>/Switch' */
} B_BMSDebounceStartZero_BCMR_A_T;

/* Block states (auto storage) for system '<S105>/BMSDebounceStartZero' */
typedef struct {
  uint16_T StateName;                  /* '<S113>/Unit Delay' */
  uint16_T StateName_h;                /* '<S114>/Unit Delay1' */
  boolean_T StateName_hn;              /* '<S111>/Unit Delay' */
  boolean_T StateName_a;               /* '<S113>/Unit Delay1' */
  boolean_T StateName_g;               /* '<S114>/Unit Delay2' */
} DW_BMSDebounceStartZero_BCMR__T;

/* Block states (auto storage) for system '<S156>/TONV_TimeDebounce' */
typedef struct {
  real32_T Delay_DSTATE;               /* '<S158>/Delay' */
} DW_TONV_TimeDebounce_BCMR_ACh_T;

/* Block states (auto storage) for system '<S1>/AcChgPreThemalCalc' */
typedef struct {
  DW_TONV_TimeDebounce_BCMR_ACh_T TONV_TimeDebounce;/* '<S156>/TONV_TimeDebounce' */
} DW_AcChgPreThemalCalc_BCMR_AC_T;

/* Block signals for system '<S338>/1-D Hysteresis1' */
typedef struct {
  uint8_T Switch;                      /* '<S342>/Switch' */
} B_HysteresisCalc_T;

/* Block signals for system '<S338>/TONV_TimeDebounce1' */
typedef struct {
  boolean_T RelationalOperator;        /* '<S345>/Relational Operator' */
} B_TONV_TimeDebounce_BCMR_AC_b_T;

/* Block states (auto storage) for system '<S338>/TONV_TimeDebounce1' */
typedef struct {
  real32_T Delay_DSTATE;               /* '<S345>/Delay' */
} DW_TONV_TimeDebounce_BCMR_A_p_T;

/* Block signals for system '<S361>/BCMR_AChrgTiRevTimCalc' */
typedef struct {
  real32_T Saturation3;                /* '<S366>/Saturation3' */
} B_BCMR_AChrgTiRevTimCalc_BCMR_T;

/* Block states (auto storage) for system '<S361>/BCMR_AChrgTiRevTimCalc' */
typedef struct {
  real32_T Delay_DSTATE;               /* '<S366>/Delay' */
  boolean_T BCMR_AChrgTiRevTimCalc_MODE;/* '<S361>/BCMR_AChrgTiRevTimCalc' */
} DW_BCMR_AChrgTiRevTimCalc_BCM_T;

/* Block signals for system '<S372>/AI_Filter' */
typedef struct {
  real32_T DataTypeConversion1;        /* '<S373>/Data Type Conversion1' */
} B_RemChgTimeCalc_AI_Filter_T;

/* Block states (auto storage) for system '<S372>/AI_Filter' */
typedef struct {
  real32_T TappedDelay_X[600];         /* '<S373>/Tapped Delay' */
} DW_RemChgTimeCalc_AI_Filter_T;

/* Block signals for system '<S1>/flt_debounce' */
typedef struct {
  int16_T Relay;                       /* '<S36>/Relay' */
} B_AChrg_debounce_T;

/* Block states (auto storage) for system '<S1>/flt_debounce' */
typedef struct {
  int16_T UnitDelay1_DSTATE;           /* '<S36>/Unit Delay1' */
  boolean_T Relay_Mode;                /* '<S36>/Relay' */
} DW_AChrg_debounce_T;

/* Block signals for system '<S1>/hld_ai_LVSupFb1' */
typedef struct {
  real32_T DataTypeConversion1;        /* '<S37>/Data Type Conversion1' */
} B_AChrg_AI_Filter_T;

/* Block states (auto storage) for system '<S1>/hld_ai_LVSupFb1' */
typedef struct {
  real32_T TappedDelay_X[50];          /* '<S37>/Tapped Delay' */
} DW_AChrg_AI_Filter_T;

/* Block signals (auto storage) */
typedef struct {
  real32_T Sum;                        /* '<S399>/Sum' */
  real32_T Sum_m;                      /* '<S372>/Sum' */
  real32_T BCMR_iReqCurrChrg_n;        /* '<S7>/AcChrg' */
  real32_T BCMR_bChrgFul;              /* '<S7>/AcChrg' */
  real32_T MinMax;                     /* '<S5>/MinMax' */
  real32_T BCMR_vVoltReqCalc;          /* '<S110>/Switch4' */
  real32_T Abs;                        /* '<S106>/Abs' */
  int16_T Switch6;                     /* '<S363>/Switch6' */
  uint16_T BCMR_tiRemChgTime;          /* '<S7>/AcChrg' */
  uint8_T enum_i;                      /* '<S334>/circulateDispay' */
  uint8_T BCMR_stAChrgPreThemalMode;   /* '<S7>/AcChrg' */
  uint8_T BCMR_stPreThmObsvr_i;        /* '<S7>/AcChrg' */
  uint8_T BCMR_stAChrgObsr_l;          /* '<S7>/AcChrg' */
  uint8_T BCMR_rAChrgTrickleCnt;       /* '<S125>/Chart' */
  uint8_T OutportBufferForLocal_stAChrgFl[15];/* '<S4>/AcChrgFodb' */
  boolean_T RelationalOperator_e;      /* '<S357>/Relational Operator' */
  boolean_T Local_PreHeatChk;          /* '<S338>/Logical Operator' */
  boolean_T RelationalOperator_o;      /* '<S341>/Relational Operator' */
  boolean_T BCMR_flgChrgCmd_n;         /* '<S7>/AcChrg' */
  boolean_T Delay2;                    /* '<S5>/Delay2' */
  boolean_T BCMR_bAChrgTrickle;        /* '<S125>/Chart' */
  boolean_T Local_flgAcChgFobd;        /* '<S38>/Logical Operator3' */
  boolean_T LogicalOperator7;          /* '<S38>/Logical Operator7' */
  boolean_T LogicalOperator6;          /* '<S38>/Logical Operator6' */
  boolean_T TempAbnorm;                /* '<S45>/Logical Operator' */
  boolean_T DataTypeConversion;        /* '<S81>/Data Type Conversion' */
  boolean_T RelationalOperator_p;      /* '<S85>/Relational Operator' */
  boolean_T RelationalOperator_c;      /* '<S84>/Relational Operator' */
  boolean_T RelationalOperator_pu;     /* '<S83>/Relational Operator' */
  boolean_T RelationalOperator_n;      /* '<S82>/Relational Operator' */
  boolean_T DataTypeConversion_a;      /* '<S67>/Data Type Conversion' */
  boolean_T RelationalOperator_j;      /* '<S72>/Relational Operator' */
  boolean_T RelationalOperator_b;      /* '<S71>/Relational Operator' */
  boolean_T RelationalOperator_ja;     /* '<S70>/Relational Operator' */
  boolean_T RelationalOperator_bd;     /* '<S69>/Relational Operator' */
  enmAChrgTrickleSts BCMR_stAChrgTrickle_h;/* '<S125>/Chart' */
  B_AChrg_AI_Filter_T hld_ai_LVSupFb1; /* '<S1>/hld_ai_LVSupFb1' */
  B_AChrg_debounce_T flt_debounce;     /* '<S1>/flt_debounce' */
  B_BMSDebounceStartZero_BCMR_A_T BMSDebounceStartZero1;/* '<S34>/BMSDebounceStartZero1' */
  B_BMSDebounceStartZero_BCMR_A_T BMSDebounceStartZero;/* '<S34>/BMSDebounceStartZero' */
  B_RemChgTimeCalc_AI_Filter_T AI_Filter;/* '<S410>/AI_Filter' */
  B_RemChgTimeCalc_AI_Filter_T AI_Filter1;/* '<S399>/AI_Filter1' */
  B_BCMR_AChrgTiRevTimCalc_BCMR_T BCMR_AChrgTiRevTimCalc;/* '<S362>/BCMR_AChrgTiRevTimCalc' */
  B_RemChgTimeCalc_AI_Filter_T AI_Filter_f;/* '<S383>/AI_Filter' */
  B_RemChgTimeCalc_AI_Filter_T AI_Filter_fq;/* '<S372>/AI_Filter' */
  B_BCMR_AChrgTiRevTimCalc_BCMR_T BCMR_AChrgTiRevTimCalc_b;/* '<S361>/BCMR_AChrgTiRevTimCalc' */
  B_TONV_TimeDebounce_BCMR_AC_b_T TONV_TimeDebounce1;/* '<S338>/TONV_TimeDebounce1' */
  B_HysteresisCalc_T uDHysteresis2;    /* '<S338>/1-D Hysteresis2' */
  B_HysteresisCalc_T uDHysteresis1;    /* '<S338>/1-D Hysteresis1' */
  B_BMSDebounceStartZero_BCMR_A_T BMSDebounceStartZero_g;/* '<S125>/BMSDebounceStartZero' */
  B_BMSDebounceStartZero_BCMR_A_T BMSDebounceStartZero_e;/* '<S105>/BMSDebounceStartZero' */
} B_BCMR_AChrg_T;

/* Block states (auto storage) for system '<Root>' */
typedef struct {
  real32_T Delay_DSTATE;                 /* '<S410>/Delay' */
  real32_T Delay1_DSTATE;                /* '<S360>/Delay1' */
  real32_T Delay_DSTATE_b;               /* '<S383>/Delay' */
  real32_T Delay_DSTATE_j;               /* '<S422>/Delay' */
  real32_T Delay_DSTATE_m;               /* '<S399>/Delay' */
  real32_T Delay_DSTATE_g;               /* '<S372>/Delay' */
  real32_T Delay_DSTATE_d;               /* '<S68>/Delay' */
  real32_T BCMR_tiChrgFulCnt;            /* '<S7>/AcChrg' */
  real32_T BCMR_ChgWaitingFlt;           /* '<S7>/AcChrg' */
  real32_T data;
  real32_T UnitDelay2_DSTATE;          /* '<S1>/Unit Delay2' */
  real32_T UnitDelay3_DSTATE;          /* '<S1>/Unit Delay3' */
  real32_T UnitDelay4_DSTATE;          /* '<S1>/Unit Delay4' */
  real32_T StateName;                  /* '<S1>/Unit Delay21' */
  real32_T UnitDelay_DSTATE;           /* '<S306>/Unit Delay' */
  real32_T UnitDelay_DSTATE_d;         /* '<S309>/Unit Delay' */
  real32_T UnitDelay_DSTATE_k;         /* '<S312>/Unit Delay' */
  real32_T UnitDelay_DSTATE_dh;        /* '<S315>/Unit Delay' */
  real32_T UnitDelay_DSTATE_c;         /* '<S318>/Unit Delay' */
  real32_T UnitDelay_DSTATE_o;         /* '<S321>/Unit Delay' */
  real32_T UnitDelay_DSTATE_ci;        /* '<S324>/Unit Delay' */
  real32_T UnitDelay_DSTATE_i;         /* '<S327>/Unit Delay' */
  real32_T UnitDelay_DSTATE_f;         /* '<S330>/Unit Delay' */
  real32_T UnitDelay_DSTATE_a;         /* '<S333>/Unit Delay' */
  real32_T UnitDelay_DSTATE_c5;        /* '<S441>/Unit Delay' */
  real32_T Delay_DSTATE_e;             /* '<S35>/Delay' */
  real32_T Delay_DSTATE_o;             /* '<S453>/Delay' */
  real32_T Delay1_DSTATE_c;            /* '<S397>/Delay1' */
  real32_T Delay1_DSTATE_l;            /* '<S370>/Delay1' */
  real32_T UnitDelay_DSTATE_cp;        /* '<S431>/Unit Delay' */
  real32_T UnitDelay_DSTATE_dv;        /* '<S436>/Unit Delay' */
  real32_T Delay_DSTATE_gi;            /* '<S438>/Delay' */
  real32_T Delay_DSTATE_d5;            /* '<S437>/Delay' */
  real32_T Delay_DSTATE_c;             /* '<S408>/Delay' */
  real32_T Delay_DSTATE_p;             /* '<S407>/Delay' */
  real32_T Delay_DSTATE_i;             /* '<S381>/Delay' */
  real32_T Delay_DSTATE_go;            /* '<S380>/Delay' */
  real32_T Delay_DSTATE_jc;            /* '<S357>/Delay' */
  real32_T Delay_DSTATE_n;             /* '<S341>/Delay' */
  real32_T Delay_DSTATE_ji;            /* '<S340>/Delay' */
  real32_T Delay_DSTATE_c0;            /* '<S288>/Delay' */
  real32_T Delay_DSTATE_j3;            /* '<S287>/Delay' */
  real32_T Delay_DSTATE_d2;            /* '<S279>/Delay' */
  real32_T Delay_DSTATE_ij;            /* '<S278>/Delay' */
  real32_T Delay_DSTATE_a;             /* '<S270>/Delay' */
  real32_T Delay_DSTATE_bt;            /* '<S269>/Delay' */
  real32_T Delay_DSTATE_h;             /* '<S261>/Delay' */
  real32_T Delay_DSTATE_btr;           /* '<S260>/Delay' */
  real32_T Delay_DSTATE_k;             /* '<S252>/Delay' */
  real32_T Delay_DSTATE_mq;            /* '<S251>/Delay' */
  real32_T Delay_DSTATE_oi;            /* '<S243>/Delay' */
  real32_T Delay_DSTATE_gox;           /* '<S242>/Delay' */
  real32_T Delay_DSTATE_gr;            /* '<S234>/Delay' */
  real32_T Delay_DSTATE_ca;            /* '<S233>/Delay' */
  real32_T Delay_DSTATE_l;             /* '<S225>/Delay' */
  real32_T Delay_DSTATE_f;             /* '<S224>/Delay' */
  real32_T Delay_DSTATE_g1;            /* '<S216>/Delay' */
  real32_T Delay_DSTATE_po;            /* '<S215>/Delay' */
  real32_T Delay_DSTATE_hh;            /* '<S207>/Delay' */
  real32_T Delay_DSTATE_ijf;           /* '<S206>/Delay' */
  real32_T Delay_DSTATE_ke;            /* '<S198>/Delay' */
  real32_T Delay_DSTATE_fk;            /* '<S197>/Delay' */
  real32_T FixPtUnitDelay1_DSTATE;     /* '<S165>/FixPt Unit Delay1' */
  real32_T Delay_DSTATE_ii;            /* '<S164>/Delay' */
  real32_T Delay1_DSTATE_a;            /* '<S124>/Delay1' */
  real32_T Delay1_DSTATE_m;            /* '<S150>/Delay1' */
  real32_T UnitDelay_DSTATE_h;         /* '<S136>/Unit Delay' */
  real32_T Delay_DSTATE_es;            /* '<S154>/Delay' */
  real32_T Delay_DSTATE_a2;            /* '<S153>/Delay' */
  real32_T Delay_DSTATE_aw;            /* '<S133>/Delay' */
  real32_T Delay_DSTATE_ht;            /* '<S130>/Delay' */
  real32_T Delay_DSTATE_hm;            /* '<S129>/Delay' */
  real32_T Delay_DSTATE_hk;            /* '<S97>/Delay' */
  real32_T Delay_DSTATE_kv;            /* '<S96>/Delay' */
  real32_T Delay_DSTATE_be;            /* '<S85>/Delay' */
  real32_T Delay_DSTATE_hg;            /* '<S84>/Delay' */
  real32_T Delay_DSTATE_kj;            /* '<S83>/Delay' */
  real32_T Delay_DSTATE_pu;            /* '<S82>/Delay' */
  real32_T Delay_DSTATE_ai;            /* '<S72>/Delay' */
  real32_T Delay_DSTATE_li;            /* '<S71>/Delay' */
  real32_T Delay_DSTATE_cg;            /* '<S70>/Delay' */
  real32_T Delay_DSTATE_is;            /* '<S69>/Delay' */
  real32_T UnitDelay_DSTATE_au;        /* '<S68>/Unit Delay' */
  real32_T Delay_DSTATE_lf;            /* '<S65>/Delay' */
  real32_T time;                       /* '<S31>/AcChrg' */
  real32_T time_h;                     /* '<S30>/AcChrg' */
  real32_T ti;                         /* '<S30>/AcChrg' */
  real32_T time_g;                     /* '<S29>/AcChrg' */
  real32_T time_hl;                    /* '<S25>/AcChrg' */
  real32_T b;                          /* '<S334>/circulateDispay' */
  real32_T num;                        /* '<S334>/circulateDispay' */
  real32_T j;                          /* '<S334>/circulateDispay' */
  real32_T BCMR_DischgWaitingFlt;      /* '<S7>/AcChrg' */
  uint32_T temporalCounter_i1;         /* '<S7>/AcChrg' */
  int16_T UnitDelay2_DSTATE_l;         /* '<S363>/Unit Delay2' */
  int16_T UnitDelay7_DSTATE;           /* '<S363>/Unit Delay7' */
  uint16_T Delay1_DSTATE_cy;           /* '<S428>/Delay1' */
  uint16_T StateName_m;                /* '<S347>/Unit Delay' */
  uint16_T StateName_f;                /* '<S348>/Unit Delay1' */
  uint16_T FixPtUnitDelay1_DSTATE_f;   /* '<S163>/FixPt Unit Delay1' */
  uint8_T UnitDelay_DSTATE_oo;         /* '<S1>/Unit Delay' */
  uint8_T UnitDelay7_DSTATE_j;         /* '<S1>/Unit Delay7' */
  uint8_T UnitDelay5_DSTATE;           /* '<S1>/Unit Delay5' */
  uint8_T StateName_j;                 /* '<S26>/Unit Delay21' */
  uint8_T UnitDelay1_DSTATE;           /* '<S1>/Unit Delay1' */
  uint8_T Delay3_DSTATE;               /* '<S286>/Delay3' */
  uint8_T Delay3_DSTATE_o;             /* '<S277>/Delay3' */
  uint8_T Delay3_DSTATE_k;             /* '<S268>/Delay3' */
  uint8_T Delay3_DSTATE_b;             /* '<S259>/Delay3' */
  uint8_T Delay3_DSTATE_f;             /* '<S250>/Delay3' */
  uint8_T Delay3_DSTATE_e;             /* '<S241>/Delay3' */
  uint8_T Delay3_DSTATE_o0;            /* '<S232>/Delay3' */
  uint8_T Delay3_DSTATE_k4;            /* '<S223>/Delay3' */
  uint8_T Delay3_DSTATE_i;             /* '<S214>/Delay3' */
  uint8_T Delay3_DSTATE_bw;            /* '<S205>/Delay3' */
  uint8_T Delay3_DSTATE_j;             /* '<S196>/Delay3' */
  uint8_T FixPtUnitDelay2_DSTATE;      /* '<S165>/FixPt Unit Delay2' */
  uint8_T FixPtUnitDelay2_DSTATE_n;    /* '<S163>/FixPt Unit Delay2' */
  uint8_T Delay_DSTATE_f3;             /* '<S125>/Delay' */
  uint8_T Delay3_DSTATE_h;             /* '<S95>/Delay3' */
  uint8_T Delay3_DSTATE_m;             /* '<S80>/Delay3' */
  uint8_T Delay3_DSTATE_ft;            /* '<S66>/Delay3' */
  boolean_T Delay_DSTATE_mp;           /* '<S305>/Delay' */
  boolean_T UnitDelay6_DSTATE;         /* '<S1>/Unit Delay6' */
  boolean_T Delay_DSTATE_bh;           /* '<S34>/Delay' */
  boolean_T StateName_b;               /* '<S7>/Unit Delay21' */
  boolean_T Delay2_DSTATE;             /* '<S186>/Delay2' */
  boolean_T Delay_DSTATE_cj;           /* '<S308>/Delay' */
  boolean_T Delay2_DSTATE_e;           /* '<S187>/Delay2' */
  boolean_T Delay_DSTATE_ma;           /* '<S311>/Delay' */
  boolean_T Delay2_DSTATE_e2;          /* '<S188>/Delay2' */
  boolean_T Delay_DSTATE_a22;          /* '<S314>/Delay' */
  boolean_T Delay2_DSTATE_d;           /* '<S189>/Delay2' */
  boolean_T Delay_DSTATE_o3;           /* '<S320>/Delay' */
  boolean_T Delay2_DSTATE_i;           /* '<S191>/Delay2' */
  boolean_T Delay_DSTATE_hhv;          /* '<S323>/Delay' */
  boolean_T Delay2_DSTATE_f;           /* '<S192>/Delay2' */
  boolean_T Delay_DSTATE_i1;           /* '<S332>/Delay' */
  boolean_T Delay2_DSTATE_l;           /* '<S195>/Delay2' */
  boolean_T Delay_DSTATE_fd;           /* '<S326>/Delay' */
  boolean_T Delay2_DSTATE_dx;          /* '<S193>/Delay2' */
  boolean_T Delay_DSTATE_am;           /* '<S329>/Delay' */
  boolean_T Delay2_DSTATE_j;           /* '<S194>/Delay2' */
  boolean_T Delay2_DSTATE_b;           /* '<S190>/Delay2' */
  boolean_T Delay2_DSTATE_eo;          /* '<S20>/Delay2' */
  boolean_T Delay1_DSTATE_g;           /* '<S451>/Delay1' */
  boolean_T Delay1_DSTATE_g1;          /* '<S449>/Delay1' */
  boolean_T Delay1_DSTATE_my;          /* '<S447>/Delay1' */
  boolean_T Delay1_DSTATE_al;          /* '<S445>/Delay1' */
  boolean_T Delay1_DSTATE_i;           /* '<S444>/Delay1' */
  boolean_T Delay1_DSTATE_ip;          /* '<S443>/Delay1' */
  boolean_T Delay1_DSTATE_ah;          /* '<S439>/Delay1' */
  boolean_T UnitDelay1_DSTATE_k;       /* '<S397>/Unit Delay1' */
  boolean_T UnitDelay1_DSTATE_m;       /* '<S370>/Unit Delay1' */
  boolean_T Delay2_DSTATE_bz;          /* '<S427>/Delay2' */
  boolean_T Delay_DSTATE_br;           /* '<S430>/Delay' */
  boolean_T Delay_DSTATE_ao;           /* '<S435>/Delay' */
  boolean_T Delay2_DSTATE_h;           /* '<S423>/Delay2' */
  boolean_T Delay1_DSTATE_h;           /* '<S434>/Delay1' */
  boolean_T Delay1_DSTATE_lc;          /* '<S429>/Delay1' */
  boolean_T Delay1_DSTATE_k;           /* '<S426>/Delay1' */
  boolean_T StateName_a;               /* '<S344>/Unit Delay' */
  boolean_T StateName_b3;              /* '<S347>/Unit Delay1' */
  boolean_T StateName_p;               /* '<S348>/Unit Delay2' */
  boolean_T Delay1_DSTATE_ma;          /* '<S14>/Delay1' */
  boolean_T Delay1_DSTATE_e;           /* '<S331>/Delay1' */
  boolean_T Delay1_DSTATE_p;           /* '<S328>/Delay1' */
  boolean_T Delay1_DSTATE_d;           /* '<S325>/Delay1' */
  boolean_T Delay1_DSTATE_cl;          /* '<S322>/Delay1' */
  boolean_T Delay1_DSTATE_mr;          /* '<S319>/Delay1' */
  boolean_T Delay1_DSTATE_mz;          /* '<S316>/Delay1' */
  boolean_T Delay1_DSTATE_eg;          /* '<S313>/Delay1' */
  boolean_T Delay1_DSTATE_n;           /* '<S310>/Delay1' */
  boolean_T Delay1_DSTATE_ge;          /* '<S307>/Delay1' */
  boolean_T Delay1_DSTATE_g2;          /* '<S304>/Delay1' */
  boolean_T Delay2_DSTATE_n;           /* '<S286>/Delay2' */
  boolean_T Delay2_DSTATE_da;          /* '<S277>/Delay2' */
  boolean_T Delay2_DSTATE_fk;          /* '<S268>/Delay2' */
  boolean_T Delay2_DSTATE_a;           /* '<S259>/Delay2' */
  boolean_T Delay2_DSTATE_h2;          /* '<S250>/Delay2' */
  boolean_T Delay2_DSTATE_ik;          /* '<S241>/Delay2' */
  boolean_T Delay2_DSTATE_dl;          /* '<S232>/Delay2' */
  boolean_T Delay2_DSTATE_la;          /* '<S223>/Delay2' */
  boolean_T Delay2_DSTATE_m;           /* '<S214>/Delay2' */
  boolean_T Delay2_DSTATE_nl;          /* '<S205>/Delay2' */
  boolean_T Delay2_DSTATE_jv;          /* '<S196>/Delay2' */
  boolean_T Delay1_DSTATE_b;           /* '<S162>/Delay1' */
  boolean_T Delay_DSTATE_ju;           /* '<S5>/Delay' */
  boolean_T Delay1_DSTATE_he;          /* '<S5>/Delay1' */
  boolean_T Delay2_DSTATE_ex;          /* '<S5>/Delay2' */
  boolean_T UnitDelay1_DSTATE_l;       /* '<S124>/Unit Delay1' */
  boolean_T Delay2_DSTATE_eg;          /* '<S132>/Delay2' */
  boolean_T UnitDelay1_DSTATE_k3;      /* '<S150>/Unit Delay1' */
  boolean_T Delay1_DSTATE_o;           /* '<S134>/Delay1' */
  boolean_T Delay2_DSTATE_l0;          /* '<S95>/Delay2' */
  boolean_T Delay2_DSTATE_o;           /* '<S80>/Delay2' */
  boolean_T Delay2_DSTATE_mi;          /* '<S66>/Delay2' */
  uint8_T is_active_c2_BCMR_AChrg;     /* '<S31>/AcChrg' */
  uint8_T is_c2_BCMR_AChrg;            /* '<S31>/AcChrg' */
  uint8_T is_active_c6_BCMR_AChrg;     /* '<S30>/AcChrg' */
  uint8_T is_c6_BCMR_AChrg;            /* '<S30>/AcChrg' */
  uint8_T is_active_c5_BCMR_AChrg;     /* '<S29>/AcChrg' */
  uint8_T is_c5_BCMR_AChrg;            /* '<S29>/AcChrg' */
  uint8_T is_active_c7_BCMR_AChrg;     /* '<S25>/AcChrg' */
  uint8_T is_c7_BCMR_AChrg;            /* '<S25>/AcChrg' */
  uint8_T is_active_c33_BCMR_AChrg;    /* '<S334>/circulateDispay' */
  uint8_T is_c33_BCMR_AChrg;           /* '<S334>/circulateDispay' */
  uint8_T is_active_c3_BCMR_AChrg;     /* '<S7>/AcChrg' */
  uint8_T is_c3_BCMR_AChrg;            /* '<S7>/AcChrg' */
  uint8_T is_ChgInit;                  /* '<S7>/AcChrg' */
  uint8_T is_AppChrg;                  /* '<S7>/AcChrg' */
  uint8_T is_DischgWaiting;            /* '<S7>/AcChrg' */
  uint8_T is_PreThemal;                /* '<S7>/AcChrg' */
  uint8_T is_ChgWaiting;               /* '<S7>/AcChrg' */
  uint8_T is_Dischging;                /* '<S7>/AcChrg' */
  uint8_T is_Chging;                   /* '<S7>/AcChrg' */
  uint8_T is_ChgEnd;                   /* '<S7>/AcChrg' */
  uint8_T is_HVOFF;                    /* '<S7>/AcChrg' */
  uint8_T is_DischgEnd;                /* '<S7>/AcChrg' */
  uint8_T is_HVOFF_h;                  /* '<S7>/AcChrg' */
  uint8_T is_HoldTemp;                 /* '<S7>/AcChrg' */
  uint8_T is_active_c4_BCMR_AChrg;     /* '<S125>/Chart' */
  uint8_T is_c4_BCMR_AChrg;            /* '<S125>/Chart' */
  uint8_T temporalCounter_i1_i;        /* '<S125>/Chart' */
  uint8_T is_active_c1_BCMR_AChrg;     /* '<S123>/Chart' */
  uint8_T is_c1_BCMR_AChrg;            /* '<S123>/Chart' */
  boolean_T AcChgErrorPro_MODE;        /* '<S1>/AcChgErrorPro' */
  boolean_T AcChgParaCalc_MODE;        /* '<S1>/AcChgParaCalc' */
  boolean_T RemChgTimeCalc_MODE;       /* '<S1>/RemChgTimeCalc' */
  boolean_T ChgStop_MODE;              /* '<S1>/ChgStop' */
  boolean_T PtcWorkFailCheck_MODE;     /* '<S1>/PtcWorkFailCheck' */
  boolean_T Subsystem8_MODE;           /* '<S1>/Subsystem8' */
  boolean_T BCMR_AChrgTiRevTimCalc1_MODE;/* '<S394>/BCMR_AChrgTiRevTimCalc1' */
  boolean_T BCMR_AChrgTiRevTimCalc1_MODE_b;/* '<S367>/BCMR_AChrgTiRevTimCalc1' */
  boolean_T OverVoltProc_MODE;         /* '<S4>/OverVoltProc' */
  boolean_T OverCurrProc_MODE;         /* '<S4>/OverCurrProc' */
  DW_AChrg_AI_Filter_T hld_ai_LVSupFb1;/* '<S1>/hld_ai_LVSupFb1' */
  DW_AChrg_debounce_T flt_debounce;    /* '<S1>/flt_debounce' */
  DW_BMSDebounceStartZero_BCMR__T BMSDebounceStartZero1;/* '<S34>/BMSDebounceStartZero1' */
  DW_BMSDebounceStartZero_BCMR__T BMSDebounceStartZero;/* '<S34>/BMSDebounceStartZero' */
  DW_RemChgTimeCalc_AI_Filter_T AI_Filter;/* '<S410>/AI_Filter' */
  DW_RemChgTimeCalc_AI_Filter_T AI_Filter1;/* '<S399>/AI_Filter1' */
  DW_BCMR_AChrgTiRevTimCalc_BCM_T BCMR_AChrgTiRevTimCalc;/* '<S362>/BCMR_AChrgTiRevTimCalc' */
  DW_RemChgTimeCalc_AI_Filter_T AI_Filter_f;/* '<S383>/AI_Filter' */
  DW_RemChgTimeCalc_AI_Filter_T AI_Filter_fq;/* '<S372>/AI_Filter' */
  DW_BCMR_AChrgTiRevTimCalc_BCM_T BCMR_AChrgTiRevTimCalc_b;/* '<S361>/BCMR_AChrgTiRevTimCalc' */
  DW_TONV_TimeDebounce_BCMR_A_p_T TONV_TimeDebounce1;/* '<S338>/TONV_TimeDebounce1' */
  DW_AcChgPreThemalCalc_BCMR_AC_T AcChgPreThemalCalc;/* '<S1>/AcChgPreThemalCalc' */
  DW_BMSDebounceStartZero_BCMR__T BMSDebounceStartZero_g;/* '<S125>/BMSDebounceStartZero' */
  DW_BMSDebounceStartZero_BCMR__T BMSDebounceStartZero_e;/* '<S105>/BMSDebounceStartZero' */
} DW_BCMR_AChrg_T;

/* Invariant block signals (auto storage) */
typedef struct {
  const uint8_T DataTypeConversion6;   /* '<S139>/Data Type Conversion6' */
  const uint8_T DataTypeConversion5;   /* '<S139>/Data Type Conversion5' */
  const uint8_T DataTypeConversion4;   /* '<S139>/Data Type Conversion4' */
} ConstB_BCMR_AChrg_T;


extern const ConstB_BCMR_AChrg_T BCMR_AChrg_ConstB;/* constant block i/o */

/*
 * Exported Global Signals
 *
 * Note: Exported global signals are block signals with an exported global
 * storage class designation.  Code generation will declare the memory for
 * these signals and export their symbols.
 *
 */
extern real32_T Local_iLCurrReqCalc;   /* '<S5>/Add' */
extern real32_T Local_iBattCurrReqCalc;/* '<S108>/Data Type Conversion1' */
extern real32_T AffixCurrTp4;          /* '<S107>/Divide' */
extern real32_T Local_AffixCurrCalc;   /* '<S107>/Gain' */
extern boolean_T Local_PreCoolChk;     /* '<S338>/TONV_TimeDebounce1' */
extern boolean_T Local_flgPwrRdc;      /* '<S63>/Compare' */
extern boolean_T Local_flgAcChgWarn;   /* '<S39>/Logical Operator1' */
extern boolean_T DutyCycleAbnorm;      /* '<S65>/Relational Operator' */
extern boolean_T Local_stPreHeatVoltOutput;/* '<S158>/Relational Operator' */

/* Model entry point functions */
extern void BCMR_AChrg_initialize(void);
extern void BCMR_AChrg_step(void);

/* Exported data declaration */

/* Volatile memory section */
#define ASW1_OEM_START_SEC_DEFAULT_RAM2_CLEARED_UNSPECIFIED
#include "Asw1_OEM_MemMap.h"

/* Declaration for custom storage class: Volatile */
extern volatile uint8_T DFC_AChgFobd_ASW;
extern volatile uint8_T DFC_AChgHVOffTmt_ASW;
extern volatile uint8_T DFC_AChgHVOnTmt_ASW;
extern volatile uint8_T DFC_AChgRdyPndiTmt_ASW;
extern volatile uint8_T DFC_AChgRdyTmt_ASW;
extern volatile uint8_T DFC_AChgingErr_ASW;
extern volatile uint8_T DFC_AChrgCellOvrTemp_ASW;
extern volatile uint8_T DFC_AChrgCnntErr_ASW;
extern volatile uint8_T DFC_AChrgCurrMish_ASW;
extern volatile uint8_T DFC_AChrgVoltMish_ASW;
extern volatile uint8_T DFC_AcDischgFobd_ASW;
extern volatile uint8_T DFC_PreHeatObcStatusErr_ASW;
extern volatile uint8_T DFC_PreHeatPtcErr_ASW;
extern volatile uint8_T DFC_PreHeatVcuReqTmt_ASW;

#define ASW1_OEM_STOP_SEC_DEFAULT_RAM2_CLEARED_UNSPECIFIED
#include "Asw1_OEM_MemMap.h"
#define ASW1_OEM_START_SEC_DEFAULT_RAM2_CLEARED_UNSPECIFIED
#include "Asw1_OEM_MemMap.h"

/* Declaration for custom storage class: OutputSignal */
extern volatile boolean_T AcChrgCnnt;
extern volatile boolean_T AcChrgWkup;
extern volatile boolean_T BCMR_bAChgHVOffTmOut;
extern volatile boolean_T BCMR_bAChgHVOnTmOut;
extern volatile boolean_T BCMR_bAChgRdyPendingTmOut;
extern volatile boolean_T BCMR_bAChgRdyTmOut;
extern volatile boolean_T BCMR_bAChgWaitingTmOut;
extern volatile boolean_T BCMR_bAChgingFlt;
extern volatile boolean_T BCMR_bAChrgCellOvrTemp;
extern volatile boolean_T BCMR_bAChrgCnntFlt;
extern volatile boolean_T BCMR_bAChrgCurrMish;
extern volatile boolean_T BCMR_bAChrgCurrOutRngErrDet;
extern volatile boolean_T BCMR_bAChrgCurrOutRngErrHeal;
extern volatile boolean_T BCMR_bAChrgFul;
extern volatile boolean_T BCMR_bAChrgOvrCurrErrDet;
extern volatile boolean_T BCMR_bAChrgOvrCurrErrHeal;
extern volatile boolean_T BCMR_bAChrgOvrVoltErrDet;
extern volatile boolean_T BCMR_bAChrgOvrVoltErrHeal;
extern volatile boolean_T BCMR_bAChrgPwrDwnReq;
extern volatile boolean_T BCMR_bAChrgPwrUpReq;
extern volatile boolean_T BCMR_bAChrgRdy;
extern volatile boolean_T BCMR_bAChrgVoltMish;
extern volatile boolean_T BCMR_bAChrgVoltOutRngErrDet;
extern volatile boolean_T BCMR_bAChrgVoltOutRngErrHeal;
extern volatile boolean_T BCMR_bAcChgFobd;
extern volatile boolean_T BCMR_bAcChrgHeatFbd;
extern volatile boolean_T BCMR_bAcDischgFobd;
extern volatile boolean_T BCMR_bAcDischgRdy;
extern volatile boolean_T BCMR_bPreHeatObcStatusErr;
extern volatile boolean_T BCMR_bPreHeatPtcErr;
extern volatile boolean_T BCMR_bPreHeatVcuReqTmt;
extern volatile boolean_T BCMR_flgChgStop;
extern volatile boolean_T BCMR_flgChrgCmd;
extern volatile boolean_T BCMR_flgDischgCmd;
extern volatile uint8_T BCMR_holdtemp;
extern volatile boolean_T BCMR_holdtempreq;
extern volatile boolean_T BCMR_holdtemprise;
extern volatile real32_T BCMR_holdtempti;
extern volatile real32_T BCMR_iCurrReqCalcTmpA;
extern volatile real32_T BCMR_iReqCurrChrg;
extern volatile real32_T BCMR_pActPwrChrg;
extern volatile real32_T BCMR_pHeatPwrReq;
extern volatile uint8_T BCMR_stAChgDischg;
extern volatile uint8_T BCMR_stAChrgCnnt;
extern volatile uint8_T BCMR_stAChrgFltCode;
extern volatile uint8_T BCMR_stAChrgMode;
extern volatile uint8_T BCMR_stAChrgObsr;
extern volatile uint8_T BCMR_stAChrgPreThmMode;
extern volatile uint8_T BCMR_stAChrgPreThmReq;
extern volatile uint8_T BCMR_stAChrgTrickle;
extern volatile uint8_T BCMR_stAppChrgMode;
extern volatile uint8_T BCMR_stChrgAbnmExit;
extern volatile uint8_T BCMR_stHoldTempObsvr;
extern volatile uint8_T BCMR_stHoldTempReq;
extern volatile uint8_T BCMR_stIviDischg;
extern volatile uint8_T BCMR_stPreThmFltCode;
extern volatile uint8_T BCMR_stPreThmObsvr;
extern volatile uint8_T BCMR_stV2xMod;
extern volatile real32_T BCMR_tTempCurrReq;
extern volatile real32_T BCMR_tiRemAChgTime;
extern volatile real32_T BCMR_uMaxVoltChrg;
extern volatile real32_T BCMR_uReqVoltChrg;
extern volatile real32_T BCMR_uVoltCurrReq;
extern volatile boolean_T HoldTempTimax;
extern volatile boolean_T Local_HoldtempChk;
extern volatile boolean_T Local_flgPreHeatFobd;
/* Block signals (auto storage) */
extern B_BCMR_AChrg_T BCMR_AChrg_B;

/* Block states (auto storage) */
extern DW_BCMR_AChrg_T BCMR_AChrg_DW;

#define ASW1_OEM_STOP_SEC_DEFAULT_RAM2_CLEARED_UNSPECIFIED
#include "Asw1_OEM_MemMap.h"

/*-
 * The generated code includes comments that allow you to trace directly
 * back to the appropriate location in the model.  The basic format
 * is <system>/block_name, where system is the system number (uniquely
 * assigned by Simulink) and block_name is the name of the block.
 *
 * Use the MATLAB hilite_system command to trace the generated code back
 * to the model.  For example,
 *
 * hilite_system('<S3>')    - opens system 3
 * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
 *
 * Here is the system hierarchy for this model
 *
 * '<Root>' : 'BCMR_AChrg'
 * '<S1>'   : 'BCMR_AChrg/BCMR_AcChrg'
 * '<S2>'   : 'BCMR_AChrg/CAL1'
 * '<S3>'   : 'BCMR_AChrg/CAL3'
 * '<S4>'   : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro'
 * '<S5>'   : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc'
 * '<S6>'   : 'BCMR_AChrg/BCMR_AcChrg/AcChgPreThemalCalc'
 * '<S7>'   : 'BCMR_AChrg/BCMR_AcChrg/AcChgStateFlow'
 * '<S8>'   : 'BCMR_AChrg/BCMR_AcChrg/BCMR_AChrgIsoCalc'
 * '<S9>'   : 'BCMR_AChrg/BCMR_AcChrg/BMSDelay'
 * '<S10>'  : 'BCMR_AChrg/BCMR_AcChrg/CAL1'
 * '<S11>'  : 'BCMR_AChrg/BCMR_AcChrg/CAL2'
 * '<S12>'  : 'BCMR_AChrg/BCMR_AcChrg/ChgStop'
 * '<S13>'  : 'BCMR_AChrg/BCMR_AcChrg/DFC'
 * '<S14>'  : 'BCMR_AChrg/BCMR_AcChrg/EdgeRising'
 * '<S15>'  : 'BCMR_AChrg/BCMR_AcChrg/FltNum'
 * '<S16>'  : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro'
 * '<S17>'  : 'BCMR_AChrg/BCMR_AcChrg/PtcWorkFailCheck'
 * '<S18>'  : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc'
 * '<S19>'  : 'BCMR_AChrg/BCMR_AcChrg/SOCFul'
 * '<S20>'  : 'BCMR_AChrg/BCMR_AcChrg/StateRetention'
 * '<S21>'  : 'BCMR_AChrg/BCMR_AcChrg/Subs'
 * '<S22>'  : 'BCMR_AChrg/BCMR_AcChrg/Subs1'
 * '<S23>'  : 'BCMR_AChrg/BCMR_AcChrg/Subs2'
 * '<S24>'  : 'BCMR_AChrg/BCMR_AcChrg/Subsystem'
 * '<S25>'  : 'BCMR_AChrg/BCMR_AcChrg/Subsystem1'
 * '<S26>'  : 'BCMR_AChrg/BCMR_AcChrg/Subsystem10'
 * '<S27>'  : 'BCMR_AChrg/BCMR_AcChrg/Subsystem2'
 * '<S28>'  : 'BCMR_AChrg/BCMR_AcChrg/Subsystem3'
 * '<S29>'  : 'BCMR_AChrg/BCMR_AcChrg/Subsystem4'
 * '<S30>'  : 'BCMR_AChrg/BCMR_AcChrg/Subsystem5'
 * '<S31>'  : 'BCMR_AChrg/BCMR_AcChrg/Subsystem6'
 * '<S32>'  : 'BCMR_AChrg/BCMR_AcChrg/Subsystem7'
 * '<S33>'  : 'BCMR_AChrg/BCMR_AcChrg/Subsystem8'
 * '<S34>'  : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9'
 * '<S35>'  : 'BCMR_AChrg/BCMR_AcChrg/TONV_TimeDebounce'
 * '<S36>'  : 'BCMR_AChrg/BCMR_AcChrg/flt_debounce'
 * '<S37>'  : 'BCMR_AChrg/BCMR_AcChrg/hld_ai_LVSupFb1'
 * '<S38>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb'
 * '<S39>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgWarning'
 * '<S40>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/Compare To Constant'
 * '<S41>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/Compare To Constant1'
 * '<S42>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/DutyCycleAbnorm'
 * '<S43>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc'
 * '<S44>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc'
 * '<S45>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc'
 * '<S46>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code'
 * '<S47>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code1'
 * '<S48>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code10'
 * '<S49>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code11'
 * '<S50>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code13'
 * '<S51>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code14'
 * '<S52>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code2'
 * '<S53>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code3'
 * '<S54>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code4'
 * '<S55>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code5'
 * '<S56>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code6'
 * '<S57>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code7'
 * '<S58>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code8'
 * '<S59>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Code9'
 * '<S60>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Compare To Constant'
 * '<S61>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgFodb/Compare To Constant2'
 * '<S62>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgWarning/Compare To Constant'
 * '<S63>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgWarning/Compare To Constant2'
 * '<S64>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/AcChrgWarning/Compare To Constant3'
 * '<S65>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/DutyCycleAbnorm/TONV_TimeDebounce'
 * '<S66>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/DSM_ReportCheck'
 * '<S67>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/Diagnose'
 * '<S68>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/K_Lowpass1'
 * '<S69>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/TONV_VariableTimeDebounce'
 * '<S70>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/TONV_VariableTimeDebounce1'
 * '<S71>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/TONV_VariableTimeDebounce2'
 * '<S72>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/TONV_VariableTimeDebounce3'
 * '<S73>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/DSM_ReportCheck/Bit Clear1'
 * '<S74>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/DSM_ReportCheck/Bit Clear2'
 * '<S75>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/DSM_ReportCheck/Bit Set'
 * '<S76>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/DSM_ReportCheck/Bit Set1'
 * '<S77>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/DSM_ReportCheck/Bit Set2'
 * '<S78>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/DSM_ReportCheck/Bit Set4'
 * '<S79>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverCurrProc/Diagnose/Compare To Constant8'
 * '<S80>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/DSM_ReportCheck1'
 * '<S81>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/Diagnose'
 * '<S82>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/TONV_VariableTimeDebounce'
 * '<S83>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/TONV_VariableTimeDebounce1'
 * '<S84>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/TONV_VariableTimeDebounce2'
 * '<S85>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/TONV_VariableTimeDebounce3'
 * '<S86>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/DSM_ReportCheck1/Bit Clear1'
 * '<S87>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/DSM_ReportCheck1/Bit Clear2'
 * '<S88>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/DSM_ReportCheck1/Bit Set'
 * '<S89>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/DSM_ReportCheck1/Bit Set1'
 * '<S90>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/DSM_ReportCheck1/Bit Set2'
 * '<S91>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/DSM_ReportCheck1/Bit Set4'
 * '<S92>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/OverVoltProc/Diagnose/Compare To Constant8'
 * '<S93>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/DFC_block_ASW'
 * '<S94>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/Diagnose'
 * '<S95>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/DFC_block_ASW/DSM_ReportCheck1'
 * '<S96>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/DFC_block_ASW/TONV_VariableTimeDebounce'
 * '<S97>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/DFC_block_ASW/TONV_VariableTimeDebounce1'
 * '<S98>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/DFC_block_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S99>'  : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/DFC_block_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S100>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/DFC_block_ASW/DSM_ReportCheck1/Bit Set'
 * '<S101>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/DFC_block_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S102>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/DFC_block_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S103>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/DFC_block_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S104>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgErrorPro/TempAbnormProc/Diagnose/Compare To Constant8'
 * '<S105>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc'
 * '<S106>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/ActPwrChrgCalc'
 * '<S107>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AffixCurrCalc'
 * '<S108>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc'
 * '<S109>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/Compare To Constant'
 * '<S110>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/VoltReqCalc'
 * '<S111>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc/BMSDebounceStartZero'
 * '<S112>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc/BMSDebounceStartZero/Compare To Zero'
 * '<S113>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc/BMSDebounceStartZero/FaultProcess'
 * '<S114>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc/BMSDebounceStartZero/HealProcess'
 * '<S115>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc/BMSDebounceStartZero/FaultProcess/Decrease'
 * '<S116>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc/BMSDebounceStartZero/FaultProcess/Increase'
 * '<S117>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc/BMSDebounceStartZero/FaultProcess/Decrease/Nomal'
 * '<S118>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc/BMSDebounceStartZero/HealProcess/Compare To Zero'
 * '<S119>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc/BMSDebounceStartZero/HealProcess/Decrease'
 * '<S120>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc/BMSDebounceStartZero/HealProcess/Increase'
 * '<S121>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AcChgFulCalc/BMSDebounceStartZero/HealProcess/Decrease/Nomal'
 * '<S122>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/AffixCurrCalc/Compare To Constant'
 * '<S123>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/BCMR_AcChrgHeatFbdCalc'
 * '<S124>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/SIgFil'
 * '<S125>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem'
 * '<S126>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/VoltMaxHold'
 * '<S127>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/BCMR_AcChrgHeatFbdCalc/BCMR_AChrgFamilyUse'
 * '<S128>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/BCMR_AcChrgHeatFbdCalc/Chart'
 * '<S129>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/BCMR_AcChrgHeatFbdCalc/TONV_VariableTimeDebounce'
 * '<S130>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/BCMR_AcChrgHeatFbdCalc/TONV_VariableTimeDebounce1'
 * '<S131>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/SIgFil/Filter'
 * '<S132>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/SIgFil/Filter/StateRetention'
 * '<S133>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/SIgFil/Filter/TONV_VariableTimeDebounce'
 * '<S134>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/SIgFil/Filter/StateRetention/EdgeRising'
 * '<S135>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/SIgFil/Filter/StateRetention/Subsystem3'
 * '<S136>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/SIgFil/Filter/StateRetention/Timer'
 * '<S137>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/BMSDebounceStartZero'
 * '<S138>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/Chart'
 * '<S139>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/Subsystem'
 * '<S140>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/BMSDebounceStartZero/Compare To Zero'
 * '<S141>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/BMSDebounceStartZero/FaultProcess'
 * '<S142>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/BMSDebounceStartZero/HealProcess'
 * '<S143>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/BMSDebounceStartZero/FaultProcess/Decrease'
 * '<S144>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/BMSDebounceStartZero/FaultProcess/Increase'
 * '<S145>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/BMSDebounceStartZero/FaultProcess/Decrease/Nomal'
 * '<S146>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/BMSDebounceStartZero/HealProcess/Compare To Zero'
 * '<S147>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/BMSDebounceStartZero/HealProcess/Decrease'
 * '<S148>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/BMSDebounceStartZero/HealProcess/Increase'
 * '<S149>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/Subsystem/BMSDebounceStartZero/HealProcess/Decrease/Nomal'
 * '<S150>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/VoltMaxHold/SIgFil1'
 * '<S151>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/VoltMaxHold/SIgFil1/Filter'
 * '<S152>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/VoltMaxHold/SIgFil1/Filter/Compare To Constant1'
 * '<S153>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/VoltMaxHold/SIgFil1/Filter/TONV_VariableTimeDebounce'
 * '<S154>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgParaCalc/BattCurrReqCalc/VoltMaxHold/SIgFil1/Filter/TONV_VariableTimeDebounce1'
 * '<S155>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgPreThemalCalc/PreHeatVoltCalc'
 * '<S156>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgPreThemalCalc/PreHeatVoltOutputChk'
 * '<S157>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgPreThemalCalc/PreHeatVoltOutputChk/Compare To Constant'
 * '<S158>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgPreThemalCalc/PreHeatVoltOutputChk/TONV_TimeDebounce'
 * '<S159>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgStateFlow/AcChrg'
 * '<S160>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgStateFlow/BMSDelay'
 * '<S161>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgStateFlow/CurrReq'
 * '<S162>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgStateFlow/EdgeRising'
 * '<S163>' : 'BCMR_AChrg/BCMR_AcChrg/AcChgStateFlow/BMSDelay/Unit Delay Resettable'
 * '<S164>' : 'BCMR_AChrg/BCMR_AcChrg/BCMR_AChrgIsoCalc/TONV_VariableTimeDebounce1'
 * '<S165>' : 'BCMR_AChrg/BCMR_AcChrg/BMSDelay/Unit Delay Resettable'
 * '<S166>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block_ASW'
 * '<S167>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block1_ASW'
 * '<S168>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block10_ASW'
 * '<S169>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block2_ASW'
 * '<S170>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block3_ASW'
 * '<S171>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block4_ASW'
 * '<S172>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block5_ASW'
 * '<S173>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block6_ASW'
 * '<S174>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block7_ASW'
 * '<S175>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block8_ASW'
 * '<S176>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block9_ASW'
 * '<S177>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose'
 * '<S178>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose1'
 * '<S179>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose2'
 * '<S180>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose3'
 * '<S181>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose4'
 * '<S182>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose5'
 * '<S183>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose6'
 * '<S184>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose7'
 * '<S185>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose8'
 * '<S186>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention'
 * '<S187>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention1'
 * '<S188>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention2'
 * '<S189>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention3'
 * '<S190>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention4'
 * '<S191>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention5'
 * '<S192>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention6'
 * '<S193>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention7'
 * '<S194>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention8'
 * '<S195>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention9'
 * '<S196>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block_ASW/DSM_ReportCheck1'
 * '<S197>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block_ASW/TONV_VariableTimeDebounce'
 * '<S198>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block_ASW/TONV_VariableTimeDebounce1'
 * '<S199>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S200>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S201>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block_ASW/DSM_ReportCheck1/Bit Set'
 * '<S202>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S203>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S204>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S205>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block1_ASW/DSM_ReportCheck1'
 * '<S206>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block1_ASW/TONV_VariableTimeDebounce'
 * '<S207>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block1_ASW/TONV_VariableTimeDebounce1'
 * '<S208>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block1_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S209>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block1_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S210>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block1_ASW/DSM_ReportCheck1/Bit Set'
 * '<S211>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block1_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S212>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block1_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S213>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block1_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S214>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block10_ASW/DSM_ReportCheck1'
 * '<S215>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block10_ASW/TONV_VariableTimeDebounce'
 * '<S216>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block10_ASW/TONV_VariableTimeDebounce1'
 * '<S217>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block10_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S218>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block10_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S219>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block10_ASW/DSM_ReportCheck1/Bit Set'
 * '<S220>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block10_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S221>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block10_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S222>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block10_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S223>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block2_ASW/DSM_ReportCheck1'
 * '<S224>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block2_ASW/TONV_VariableTimeDebounce'
 * '<S225>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block2_ASW/TONV_VariableTimeDebounce1'
 * '<S226>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block2_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S227>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block2_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S228>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block2_ASW/DSM_ReportCheck1/Bit Set'
 * '<S229>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block2_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S230>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block2_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S231>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block2_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S232>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block3_ASW/DSM_ReportCheck1'
 * '<S233>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block3_ASW/TONV_VariableTimeDebounce'
 * '<S234>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block3_ASW/TONV_VariableTimeDebounce1'
 * '<S235>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block3_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S236>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block3_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S237>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block3_ASW/DSM_ReportCheck1/Bit Set'
 * '<S238>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block3_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S239>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block3_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S240>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block3_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S241>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block4_ASW/DSM_ReportCheck1'
 * '<S242>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block4_ASW/TONV_VariableTimeDebounce'
 * '<S243>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block4_ASW/TONV_VariableTimeDebounce1'
 * '<S244>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block4_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S245>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block4_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S246>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block4_ASW/DSM_ReportCheck1/Bit Set'
 * '<S247>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block4_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S248>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block4_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S249>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block4_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S250>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block5_ASW/DSM_ReportCheck1'
 * '<S251>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block5_ASW/TONV_VariableTimeDebounce'
 * '<S252>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block5_ASW/TONV_VariableTimeDebounce1'
 * '<S253>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block5_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S254>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block5_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S255>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block5_ASW/DSM_ReportCheck1/Bit Set'
 * '<S256>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block5_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S257>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block5_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S258>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block5_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S259>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block6_ASW/DSM_ReportCheck1'
 * '<S260>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block6_ASW/TONV_VariableTimeDebounce'
 * '<S261>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block6_ASW/TONV_VariableTimeDebounce1'
 * '<S262>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block6_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S263>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block6_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S264>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block6_ASW/DSM_ReportCheck1/Bit Set'
 * '<S265>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block6_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S266>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block6_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S267>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block6_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S268>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block7_ASW/DSM_ReportCheck1'
 * '<S269>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block7_ASW/TONV_VariableTimeDebounce'
 * '<S270>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block7_ASW/TONV_VariableTimeDebounce1'
 * '<S271>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block7_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S272>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block7_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S273>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block7_ASW/DSM_ReportCheck1/Bit Set'
 * '<S274>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block7_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S275>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block7_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S276>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block7_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S277>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block8_ASW/DSM_ReportCheck1'
 * '<S278>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block8_ASW/TONV_VariableTimeDebounce'
 * '<S279>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block8_ASW/TONV_VariableTimeDebounce1'
 * '<S280>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block8_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S281>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block8_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S282>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block8_ASW/DSM_ReportCheck1/Bit Set'
 * '<S283>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block8_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S284>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block8_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S285>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block8_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S286>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block9_ASW/DSM_ReportCheck1'
 * '<S287>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block9_ASW/TONV_VariableTimeDebounce'
 * '<S288>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block9_ASW/TONV_VariableTimeDebounce1'
 * '<S289>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block9_ASW/DSM_ReportCheck1/Bit Clear1'
 * '<S290>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block9_ASW/DSM_ReportCheck1/Bit Clear2'
 * '<S291>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block9_ASW/DSM_ReportCheck1/Bit Set'
 * '<S292>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block9_ASW/DSM_ReportCheck1/Bit Set1'
 * '<S293>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block9_ASW/DSM_ReportCheck1/Bit Set2'
 * '<S294>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/DFC_block9_ASW/DSM_ReportCheck1/Bit Set4'
 * '<S295>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose/Compare To Constant8'
 * '<S296>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose1/Compare To Constant8'
 * '<S297>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose2/Compare To Constant8'
 * '<S298>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose3/Compare To Constant8'
 * '<S299>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose4/Compare To Constant8'
 * '<S300>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose5/Compare To Constant8'
 * '<S301>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose6/Compare To Constant8'
 * '<S302>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose7/Compare To Constant8'
 * '<S303>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/Diagnose8/Compare To Constant8'
 * '<S304>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention/EdgeRising'
 * '<S305>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention/Subsystem3'
 * '<S306>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention/Timer'
 * '<S307>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention1/EdgeRising'
 * '<S308>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention1/Subsystem3'
 * '<S309>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention1/Timer'
 * '<S310>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention2/EdgeRising'
 * '<S311>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention2/Subsystem3'
 * '<S312>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention2/Timer'
 * '<S313>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention3/EdgeRising'
 * '<S314>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention3/Subsystem3'
 * '<S315>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention3/Timer'
 * '<S316>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention4/EdgeRising'
 * '<S317>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention4/Subsystem3'
 * '<S318>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention4/Timer'
 * '<S319>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention5/EdgeRising'
 * '<S320>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention5/Subsystem3'
 * '<S321>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention5/Timer'
 * '<S322>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention6/EdgeRising'
 * '<S323>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention6/Subsystem3'
 * '<S324>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention6/Timer'
 * '<S325>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention7/EdgeRising'
 * '<S326>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention7/Subsystem3'
 * '<S327>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention7/Timer'
 * '<S328>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention8/EdgeRising'
 * '<S329>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention8/Subsystem3'
 * '<S330>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention8/Timer'
 * '<S331>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention9/EdgeRising'
 * '<S332>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention9/Subsystem3'
 * '<S333>' : 'BCMR_AChrg/BCMR_AcChrg/DFC/StateRetention9/Timer'
 * '<S334>' : 'BCMR_AChrg/BCMR_AcChrg/FltNum/faultNumberCircleDisplay'
 * '<S335>' : 'BCMR_AChrg/BCMR_AcChrg/FltNum/faultNumberCircleDisplay/circulateDispay'
 * '<S336>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/CcCheck'
 * '<S337>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/ChgStateChk'
 * '<S338>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk'
 * '<S339>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/TempPro'
 * '<S340>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/ChgStateChk/TONV_VariableTimeDebounce'
 * '<S341>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/ChgStateChk/TONV_VariableTimeDebounce2'
 * '<S342>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/1-D Hysteresis1'
 * '<S343>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/1-D Hysteresis2'
 * '<S344>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/BMSDebounceStartZero'
 * '<S345>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/TONV_TimeDebounce1'
 * '<S346>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/BMSDebounceStartZero/Compare To Zero'
 * '<S347>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/BMSDebounceStartZero/FaultProcess'
 * '<S348>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/BMSDebounceStartZero/HealProcess'
 * '<S349>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/BMSDebounceStartZero/FaultProcess/Decrease'
 * '<S350>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/BMSDebounceStartZero/FaultProcess/Increase'
 * '<S351>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/BMSDebounceStartZero/FaultProcess/Decrease/Nomal'
 * '<S352>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/BMSDebounceStartZero/HealProcess/Compare To Zero'
 * '<S353>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/BMSDebounceStartZero/HealProcess/Decrease'
 * '<S354>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/BMSDebounceStartZero/HealProcess/Increase'
 * '<S355>' : 'BCMR_AChrg/BCMR_AcChrg/InputSignalPro/PreThemalPreChk/BMSDebounceStartZero/HealProcess/Decrease/Nomal'
 * '<S356>' : 'BCMR_AChrg/BCMR_AcChrg/PtcWorkFailCheck/Compare To Constant'
 * '<S357>' : 'BCMR_AChrg/BCMR_AcChrg/PtcWorkFailCheck/TONV_VariableTimeDebounce'
 * '<S358>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/Compare To Constant1'
 * '<S359>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/EulockCurrTransform'
 * '<S360>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/Ini7cycle'
 * '<S361>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime'
 * '<S362>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2'
 * '<S363>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro'
 * '<S364>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/EulockCurrTransform/Subsystem'
 * '<S365>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/Ini7cycle/Compare To Constant5'
 * '<S366>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/BCMR_AChrgTiRevTimCalc'
 * '<S367>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem'
 * '<S368>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem2'
 * '<S369>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/BCMR_AChrgTiRevTimCalc1'
 * '<S370>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/SIgFil1'
 * '<S371>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1'
 * '<S372>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc'
 * '<S373>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc/AI_Filter'
 * '<S374>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc/Compare To Constant'
 * '<S375>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc/Compare To Constant1'
 * '<S376>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc/Compare To Constant2'
 * '<S377>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc/AI_Filter/zeroGuardDivide'
 * '<S378>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/SIgFil1/Filter'
 * '<S379>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/SIgFil1/Filter/Compare To Constant1'
 * '<S380>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/SIgFil1/Filter/TONV_VariableTimeDebounce'
 * '<S381>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/SIgFil1/Filter/TONV_VariableTimeDebounce1'
 * '<S382>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1/BCMR_AChrgAhInit'
 * '<S383>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1/BCMR_RemChgTimeCalc'
 * '<S384>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1/Limiter'
 * '<S385>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1/Subsystem'
 * '<S386>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1/Subsystem1'
 * '<S387>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/AI_Filter'
 * '<S388>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/Compare To Constant'
 * '<S389>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/Compare To Constant1'
 * '<S390>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/Compare To Constant2'
 * '<S391>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/Subsystem'
 * '<S392>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/AI_Filter/zeroGuardDivide'
 * '<S393>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/BCMR_AChrgTiRevTimCalc'
 * '<S394>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem'
 * '<S395>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem2'
 * '<S396>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/BCMR_AChrgTiRevTimCalc1'
 * '<S397>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/SIgFil1'
 * '<S398>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1'
 * '<S399>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc'
 * '<S400>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc/AI_Filter1'
 * '<S401>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc/Compare To Constant'
 * '<S402>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc/Compare To Constant1'
 * '<S403>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc/Compare To Constant2'
 * '<S404>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/BCMR_AChrgTiRevTimCalc1/BCMR_RemChgTimeCalc/AI_Filter1/zeroGuardDivide'
 * '<S405>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/SIgFil1/Filter'
 * '<S406>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/SIgFil1/Filter/Compare To Constant1'
 * '<S407>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/SIgFil1/Filter/TONV_VariableTimeDebounce'
 * '<S408>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/SIgFil1/Filter/TONV_VariableTimeDebounce1'
 * '<S409>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1/BCMR_AChrgAhInit'
 * '<S410>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1/BCMR_RemChgTimeCalc'
 * '<S411>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1/Limiter'
 * '<S412>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1/Subsystem'
 * '<S413>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1/Subsystem1'
 * '<S414>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/AI_Filter'
 * '<S415>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/Compare To Constant'
 * '<S416>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/Compare To Constant1'
 * '<S417>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/Compare To Constant2'
 * '<S418>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/Subsystem'
 * '<S419>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/RemTime2/Subsystem/Subsystem1/BCMR_RemChgTimeCalc/AI_Filter/zeroGuardDivide'
 * '<S420>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/Compare To Constant2'
 * '<S421>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/ElecunLckTimeRetention'
 * '<S422>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/Ini_5cycle'
 * '<S423>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/StateRetention'
 * '<S424>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/Subsystem'
 * '<S425>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/TimeChange5min'
 * '<S426>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/ElecunLckTimeRetention/EdgeRising'
 * '<S427>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/ElecunLckTimeRetention/StateRetention1'
 * '<S428>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/ElecunLckTimeRetention/counter2'
 * '<S429>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/ElecunLckTimeRetention/StateRetention1/EdgeRising'
 * '<S430>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/ElecunLckTimeRetention/StateRetention1/Subsystem3'
 * '<S431>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/ElecunLckTimeRetention/StateRetention1/Timer'
 * '<S432>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/ElecunLckTimeRetention/counter2/Compare To Constant5'
 * '<S433>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/Ini_5cycle/Compare To Constant3'
 * '<S434>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/StateRetention/EdgeRising'
 * '<S435>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/StateRetention/Subsystem3'
 * '<S436>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/StateRetention/Timer'
 * '<S437>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/TimeChange5min/TONV_TimeDebounce1'
 * '<S438>' : 'BCMR_AChrg/BCMR_AcChrg/RemChgTimeCalc/TimeChangePro/TimeChange5min/TONV_TimeDebounce2'
 * '<S439>' : 'BCMR_AChrg/BCMR_AcChrg/StateRetention/EdgeRising'
 * '<S440>' : 'BCMR_AChrg/BCMR_AcChrg/StateRetention/Subsystem3'
 * '<S441>' : 'BCMR_AChrg/BCMR_AcChrg/StateRetention/Timer'
 * '<S442>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem1/AcChrg'
 * '<S443>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem1/EdgeRising'
 * '<S444>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem10/EdgeRising'
 * '<S445>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem10/EdgeRising1'
 * '<S446>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem4/AcChrg'
 * '<S447>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem4/EdgeRising'
 * '<S448>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem5/AcChrg'
 * '<S449>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem5/EdgeRising'
 * '<S450>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem6/AcChrg'
 * '<S451>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem6/EdgeRising'
 * '<S452>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem8/DutyCycleAbnorm'
 * '<S453>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem8/DutyCycleAbnorm/TONV_TimeDebounce4'
 * '<S454>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero'
 * '<S455>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero1'
 * '<S456>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero/Compare To Zero'
 * '<S457>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero/FaultProcess'
 * '<S458>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero/HealProcess'
 * '<S459>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero/FaultProcess/Decrease'
 * '<S460>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero/FaultProcess/Increase'
 * '<S461>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero/FaultProcess/Decrease/Nomal'
 * '<S462>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero/HealProcess/Compare To Zero'
 * '<S463>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero/HealProcess/Decrease'
 * '<S464>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero/HealProcess/Increase'
 * '<S465>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero/HealProcess/Decrease/Nomal'
 * '<S466>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero1/Compare To Zero'
 * '<S467>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero1/FaultProcess'
 * '<S468>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero1/HealProcess'
 * '<S469>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero1/FaultProcess/Decrease'
 * '<S470>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero1/FaultProcess/Increase'
 * '<S471>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero1/FaultProcess/Decrease/Nomal'
 * '<S472>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero1/HealProcess/Compare To Zero'
 * '<S473>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero1/HealProcess/Decrease'
 * '<S474>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero1/HealProcess/Increase'
 * '<S475>' : 'BCMR_AChrg/BCMR_AcChrg/Subsystem9/BMSDebounceStartZero1/HealProcess/Decrease/Nomal'
 * '<S476>' : 'BCMR_AChrg/BCMR_AcChrg/hld_ai_LVSupFb1/zeroGuardDivide'
 */
#endif                                 /* RTW_HEADER_BCMR_AChrg_h_ */

/*
 * File trailer for generated code.
 *
 * [EOF]
 */
