/*
 * File: SOH.h
 *
 * Code generated for Simulink model 'SOH'.
 *
 * Company                        : AIWAYS
 * Author                         : zhangzy
 * Model version                  : 'M100C100'
 * Simulink Coder version         : 8.13 (R2017b) 24-Jul-2017
 * C/C++ source code generated on : Fri Oct 23 15:05:51 2020
 *
 * Target selection: ert.tlc
 * Embedded hardware selection: Infineon->TriCore
 * Code generation objectives:
 *    1. MISRA C:2012 guidelines
 *    2. Safety precaution
 * Validation result: Not run
 */

#ifndef RTW_HEADER_SOH_h_
#define RTW_HEADER_SOH_h_
#include <math.h>
#include <stddef.h>
#ifndef SOH_COMMON_INCLUDES_
# define SOH_COMMON_INCLUDES_
#include "rtwtypes.h"
#endif                                 /* SOH_COMMON_INCLUDES_ */

#include "SOH_types.h"

/* Includes for objects with custom storage classes. */
#include "SOH_Var.h"
#include "SOH_Cal.h"
#include "SOH_Const.h"

/* Macros for accessing real-time model data structure */
#ifndef rtmGetErrorStatus
# define rtmGetErrorStatus(rtm)        ((rtm)->errorStatus)
#endif

#ifndef rtmSetErrorStatus
# define rtmSetErrorStatus(rtm, val)   ((rtm)->errorStatus = (val))
#endif

/* Block signals (auto storage) */
typedef struct {
  boolean_T LogicalOperator;           /* '<S22>/Logical Operator' */
} B_SOH_T;

/* Block states (auto storage) for system '<Root>' */
typedef struct {
  real32_T StateName_f;                /* '<S41>/Unit Delay' */
  uint32_T FixPtUnitDelay1_DSTATE;     /* '<S44>/FixPt Unit Delay1' */
  uint16_T StateName_o;                /* '<S27>/Unit Delay' */
  uint16_T StateName_a;                /* '<S28>/Unit Delay1' */
  uint16_T StateName_ki[2];            /* '<S14>/Unit Delay' */
  uint16_T FixPtUnitDelay1_DSTATE_l;   /* '<S15>/FixPt Unit Delay1' */
  uint8_T FixPtUnitDelay2_DSTATE;      /* '<S44>/FixPt Unit Delay2' */
  uint8_T StateName_d;                 /* '<S41>/Unit Delay1' */
  uint8_T StateName_l;                 /* '<S14>/Unit Delay1' */
  uint8_T FixPtUnitDelay2_DSTATE_d;    /* '<S16>/FixPt Unit Delay2' */
  uint8_T FixPtUnitDelay1_DSTATE_j;    /* '<S16>/FixPt Unit Delay1' */
  uint8_T FixPtUnitDelay2_DSTATE_f;    /* '<S15>/FixPt Unit Delay2' */
  boolean_T StateName_li;              /* '<S6>/Unit Delay' */
  boolean_T StateName_b;               /* '<S5>/Unit Delay' */
  boolean_T StateName_p0;              /* '<S8>/Unit Delay21' */
  boolean_T StateName_p5;              /* '<S23>/Unit Delay' */
  boolean_T StateName_a2;              /* '<S27>/Unit Delay1' */
  boolean_T StateName_bv;              /* '<S28>/Unit Delay2' */
  boolean_T UnitDelay_DSTATE;          /* '<S12>/Unit Delay' */
  boolean_T NVMOCVSOH_Calculation_MODE;/* '<S5>/NVMOCVSOH_Calculation' */
} DW_SOH_T;

/* Real-time Model Data Structure */
struct tag_RTM_SOH_T {
  const char_T * volatile errorStatus;
};

/* Block signals (auto storage) */
extern B_SOH_T SOH_B;

/* Block states (auto storage) */
extern DW_SOH_T SOH_DW;

/* Model entry point functions */
extern void SOH_initialize(void);

/* Exported entry point functions */
extern void SOH_CapUpdate_Init(void);

/* Exported entry point functions */
extern void SOH_CapCal_10ms(void);

/* Real-time Model object */
extern RT_MODEL_SOH_T *const SOH_M;

/*-
 * The generated code includes comments that allow you to trace directly
 * back to the appropriate location in the model.  The basic format
 * is <system>/block_name, where system is the system number (uniquely
 * assigned by Simulink) and block_name is the name of the block.
 *
 * Use the MATLAB hilite_system command to trace the generated code back
 * to the model.  For example,
 *
 * hilite_system('<S3>')    - opens system 3
 * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
 *
 * Here is the system hierarchy for this model
 *
 * '<Root>' : 'SOH'
 * '<S1>'   : 'SOH/SOH'
 * '<S2>'   : 'SOH/SOH/CapCal_10ms'
 * '<S3>'   : 'SOH/SOH/CapUpdate_Init'
 * '<S4>'   : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys'
 * '<S5>'   : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation'
 * '<S6>'   : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation'
 * '<S7>'   : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/SOH_Calculation'
 * '<S8>'   : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH'
 * '<S9>'   : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/Delay'
 * '<S10>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/Delay1'
 * '<S11>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/DiffValue1'
 * '<S12>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/EdgeRising1'
 * '<S13>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/NVMOCVSOH_Calculation'
 * '<S14>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/Unit Delay External IC'
 * '<S15>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/Delay/Unit Delay Resettable'
 * '<S16>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/Delay1/Unit Delay Resettable'
 * '<S17>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/NVMOCVSOH_Calculation/DiffValue1'
 * '<S18>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/NVMOCVSOH_Calculation/NVMData_Clear'
 * '<S19>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/NVMOCVSOH_Calculation/OCV_Store'
 * '<S20>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/NVMOCVSOH_Calculation/Protected Division'
 * '<S21>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/CurrBatCap_Calculation/NVMOCVSOH_Calculation/SumCellCap_Calculation'
 * '<S22>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/CellOCVNVM_Vld'
 * '<S23>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/DebounceStartZero'
 * '<S24>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/Limiter'
 * '<S25>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/NVMOCVCorrdSign_Clr'
 * '<S26>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/DebounceStartZero/Compare To Zero'
 * '<S27>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/DebounceStartZero/FaultProcess'
 * '<S28>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/DebounceStartZero/HealProcess'
 * '<S29>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/DebounceStartZero/FaultProcess/Decrease'
 * '<S30>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/DebounceStartZero/FaultProcess/Increase'
 * '<S31>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/DebounceStartZero/FaultProcess/Decrease/Nomal'
 * '<S32>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/DebounceStartZero/HealProcess/Compare To Zero'
 * '<S33>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/DebounceStartZero/HealProcess/Decrease'
 * '<S34>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/DebounceStartZero/HealProcess/Increase'
 * '<S35>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/NVMData_Calculation/DebounceStartZero/HealProcess/Decrease/Nomal'
 * '<S36>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/SOH_Calculation/Limiter'
 * '<S37>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/SOH_Calculation/SOH_GbSOH_CapFltAlarm_flg'
 * '<S38>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/SOH_Calculation/SOH_GbSOH_CapFltWarn_flg'
 * '<S39>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/SOH_Calculation/SOH_GcSOH_CurrBatCap_Ah'
 * '<S40>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/SOH_Calculation/SOH_GcSOH_PackSOH_pct'
 * '<S41>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/SOH_Calculation/Unit Delay External IC'
 * '<S42>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/BMSDelay1'
 * '<S43>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys'
 * '<S44>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/BMSDelay1/Unit Delay Resettable'
 * '<S45>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys/CalenderLife_Calculation'
 * '<S46>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys/CycleLife_Calculation'
 * '<S47>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys/Quality_Assurance'
 * '<S48>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys/SOH_GcSOH_PackSOH2_pct'
 * '<S49>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys/SOH_GcSOH_PackSOH3_pct'
 * '<S50>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys/CalenderLife_Calculation/CalenderLife_Calculation_sys'
 * '<S51>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys/CycleLife_Calculation/CycleLife_Calculation_sys'
 * '<S52>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys/Quality_Assurance/Odo_QualityAssurance'
 * '<S53>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys/Quality_Assurance/Usage_QualityAssurance'
 * '<S54>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys/Quality_Assurance/Odo_QualityAssurance/Odo_QualityAssurance_sys'
 * '<S55>'  : 'SOH/SOH/CapCal_10ms/CapCal_10ms_sys/TableLookup_SOH/TableLookupSOH_sys/Quality_Assurance/Usage_QualityAssurance/Usage_QualityAssurance_sys'
 * '<S56>'  : 'SOH/SOH/CapUpdate_Init/CapUpdate_Init_sys'
 * '<S57>'  : 'SOH/SOH/CapUpdate_Init/CapUpdate_Init_sys/Limiter'
 * '<S58>'  : 'SOH/SOH/CapUpdate_Init/CapUpdate_Init_sys/SOH_GcSOH_PackSOH1_pct'
 * '<S59>'  : 'SOH/SOH/CapUpdate_Init/CapUpdate_Init_sys/SumCellCap'
 * '<S60>'  : 'SOH/SOH/CapUpdate_Init/CapUpdate_Init_sys/SumCellCap/Unit Delay External IC'
 */

/*-
 * Requirements for '<Root>': SOH
 */
#endif                                 /* RTW_HEADER_SOH_h_ */

/*
 * File trailer for generated code.
 *
 * [EOF]
 */
