/*
 * File: BSPR_CellVoltCoord.h
 *
 * Code generated for Simulink model 'BSPR_CellVoltCoord'.
 *
 * Model version                  : 1.1172
 * Simulink Coder version         : 8.13 (R2017b) 24-Jul-2017
 * C/C++ source code generated on : Tue Jul 27 15:06:08 2021
 *
 * Target selection: ert.tlc
 * Embedded hardware selection: Infineon->TriCore
 * Code generation objectives:
 *    1. MISRA C:2012 guidelines
 *    2. Execution efficiency
 * Validation result: Not run
 */

#ifndef RTW_HEADER_BSPR_CellVoltCoord_h_
#define RTW_HEADER_BSPR_CellVoltCoord_h_
#include <math.h>
#ifndef BSPR_CellVoltCoord_COMMON_INCLUDES_
# define BSPR_CellVoltCoord_COMMON_INCLUDES_
#include "rtwtypes.h"
#endif                                 /* BSPR_CellVoltCoord_COMMON_INCLUDES_ */

#include "BSPR_CellVoltCoord_types.h"

/* Includes for objects with custom storage classes. */
#include "BSPR_CellVoltCoord_parameters.h"

/* Macros for accessing real-time model data structure */

/* user code (top of header file) */
#include "ASW_Interface.h"

/* Block signals for system '<S8>/VoltProcBMSDebounceStartZero1' */
typedef struct {
  boolean_T Switch;                    /* '<S31>/Switch' */
} B_VoltProcBMSDebounceStartZer_T;

/* Block states (auto storage) for system '<S8>/VoltProcBMSDebounceStartZero1' */
typedef struct {
  uint16_T StateName;                  /* '<S46>/Unit Delay' */
  uint16_T StateName_n;                /* '<S47>/Unit Delay1' */
  boolean_T StateName_g;               /* '<S46>/Unit Delay1' */
  boolean_T StateName_k;               /* '<S47>/Unit Delay2' */
} DW_VoltProcBMSDebounceStartZe_T;

/* Block signals for system '<S98>/InputValueCalc' */
typedef struct {
  real32_T Output_Value[5];            /* '<S98>/InputValueCalc' */
} B_InputValueCalc_BSPR_CellVol_T;

/* Block states (auto storage) for system '<S98>/InputValueCalc' */
typedef struct {
  uint8_T is_active_c5_BSPR_CellVoltCoord;/* '<S98>/InputValueCalc' */
} DW_InputValueCalc_BSPR_CellVo_T;

/* Block signals for system '<S98>/MaxValue_sort' */
typedef struct {
  real32_T Output_Value[5];            /* '<S98>/MaxValue_sort' */
  uint8_T Output_index[5];             /* '<S98>/MaxValue_sort' */
} B_MaxValue_sort_BSPR_CellVolt_T;

/* Block states (auto storage) for system '<S98>/MaxValue_sort' */
typedef struct {
  uint8_T is_active_c12_BSPR_CellVoltCoor;/* '<S98>/MaxValue_sort' */
} DW_MaxValue_sort_BSPR_CellVol_T;

/* Block signals for system '<S112>/InputValueCalc1' */
typedef struct {
  uint8_T Output_Value[5];             /* '<S112>/InputValueCalc1' */
} B_InputValueCalc1_BSPR_CellVo_T;

/* Block states (auto storage) for system '<S112>/InputValueCalc1' */
typedef struct {
  uint8_T is_active_c8_BSPR_CellVoltCoord;/* '<S112>/InputValueCalc1' */
} DW_InputValueCalc1_BSPR_CellV_T;

/* Block signals for system '<S129>/Unit Delay External IC1' */
typedef struct {
  uint16_T Init;                       /* '<S131>/Init' */
} B_UnitDelayExternalIC1_BSPR_C_T;

/* Block states (auto storage) for system '<S129>/Unit Delay External IC1' */
typedef struct {
  uint16_T StateName;                  /* '<S131>/Unit Delay' */
  uint8_T StateName_j;                 /* '<S131>/Unit Delay1' */
} DW_UnitDelayExternalIC1_BSPR__T;

/* Block signals (auto storage) */
typedef struct {
  real32_T GcCDP_AvgCellVolt_mV;       /* '<S163>/Data Type Conversion' */
  real32_T LcCDP_SumCellVolt_mV;       /* '<S164>/Add' */
  real32_T LcCDP_MinCellVolt_mV;       /* '<S102>/Data Type Conversion1' */
  real32_T LcCDP_MaxCellVolt_mV;       /* '<S102>/Data Type Conversion2' */
  real32_T Output_Value[480];          /* '<S90>/MaxValue_sort' */
  real32_T TargetOutput_Value[96];     /* '<S90>/MaxValue_sort' */
  real32_T Output_Value_a[480];        /* '<S90>/InputValueCalc' */
  real32_T Output_Value_d[150];        /* '<S1>/Chart2' */
  uint16_T LcCDP_MaxCellVolt_mV_f;     /* '<S129>/Switch' */
  uint16_T LcCDP_MinCellVolt_mV_e;     /* '<S130>/Switch' */
  uint16_T Output_Value_l[96];         /* '<S1>/Chart1' */
  uint8_T LcCDP_MaxCellVoltNumb_numb;  /* '<S129>/Switch1' */
  uint8_T LcCDP_MinCellVoltNumb_numb;  /* '<S130>/Switch1' */
  uint8_T Output_Value_o[96];          /* '<S1>/Chart' */
  boolean_T LbCDP_SumCellVoltVld_flg;  /* '<S160>/Logical Operator1' */
  boolean_T LbCDP_CellVoltUpdateVld_flg;/* '<S159>/Comparison1' */
  B_UnitDelayExternalIC1_BSPR_C_T UnitDelayExternalIC1_i;/* '<S130>/Unit Delay External IC1' */
  B_UnitDelayExternalIC1_BSPR_C_T UnitDelayExternalIC1;/* '<S129>/Unit Delay External IC1' */
  B_InputValueCalc1_BSPR_CellVo_T sf_InputValueCalc1_f;/* '<S122>/InputValueCalc1' */
  B_MaxValue_sort_BSPR_CellVolt_T sf_MinValue_sort;/* '<S99>/MinValue_sort' */
  B_InputValueCalc_BSPR_CellVol_T sf_InputValueCalc_d;/* '<S99>/InputValueCalc' */
  B_InputValueCalc1_BSPR_CellVo_T sf_InputValueCalc1;/* '<S112>/InputValueCalc1' */
  B_MaxValue_sort_BSPR_CellVolt_T sf_MaxValue_sort;/* '<S98>/MaxValue_sort' */
  B_InputValueCalc_BSPR_CellVol_T sf_InputValueCalc;/* '<S98>/InputValueCalc' */
  B_VoltProcBMSDebounceStartZer_T VoltProcBMSDebounceStartZero2;/* '<S8>/VoltProcBMSDebounceStartZero2' */
  B_VoltProcBMSDebounceStartZer_T VoltProcBMSDebounceStartZero1;/* '<S8>/VoltProcBMSDebounceStartZero1' */
} B_BSPR_CellVoltCoord_T;

/* Block states (auto storage) for system '<Root>' */
typedef struct {
  real32_T StateName[96];              /* '<S88>/Unit Delay' */
  real32_T StateName_m[5];             /* '<S98>/Unit Delay21' */
  real32_T StateName_k[5];             /* '<S99>/Unit Delay21' */
  real32_T Delay_DSTATE;               /* '<S74>/Delay' */
  real32_T Delay_DSTATE_k;             /* '<S73>/Delay' */
  real32_T Delay_DSTATE_d;             /* '<S72>/Delay' */
  uint8_T StateName_b[5];              /* '<S112>/Unit Delay1' */
  uint8_T StateName_n[5];              /* '<S122>/Unit Delay1' */
  uint8_T Delay3_DSTATE;               /* '<S71>/Delay3' */
  uint8_T Delay3_DSTATE_o;             /* '<S70>/Delay3' */
  uint8_T Delay3_DSTATE_e;             /* '<S30>/Delay3' */
  uint8_T Delay3_DSTATE_l;             /* '<S29>/Delay3' */
  boolean_T Delay2_DSTATE;             /* '<S71>/Delay2' */
  boolean_T Delay2_DSTATE_k;           /* '<S70>/Delay2' */
  boolean_T Delay2_DSTATE_e;           /* '<S30>/Delay2' */
  boolean_T Delay2_DSTATE_n;           /* '<S29>/Delay2' */
  uint8_T is_active_c13_BSPR_CellVoltCoor;/* '<S90>/MaxValue_sort' */
  uint8_T is_active_c2_BSPR_CellVoltCoord;/* '<S90>/InputValueCalc' */
  uint8_T is_c2_BSPR_CellVoltCoord;    /* '<S90>/InputValueCalc' */
  uint8_T i;                           /* '<S90>/InputValueCalc' */
  uint8_T is_active_c17_BSPR_CellVoltCoor;/* '<S1>/Chart2' */
  uint8_T i_c;                         /* '<S1>/Chart2' */
  uint8_T is_active_c15_BSPR_CellVoltCoor;/* '<S1>/Chart1' */
  uint8_T i_g;                         /* '<S1>/Chart1' */
  uint8_T is_active_c14_BSPR_CellVoltCoor;/* '<S1>/Chart' */
  uint8_T i_i;                         /* '<S1>/Chart' */
  boolean_T Sum_CellVolt_Get_Sys_MODE; /* '<S89>/Sum_CellVolt_Get_Sys' */
  boolean_T MaxMin_CellVolt_Get_Sys_MODE;/* '<S89>/MaxMin_CellVolt_Get_Sys' */
  DW_UnitDelayExternalIC1_BSPR__T UnitDelayExternalIC1_i;/* '<S130>/Unit Delay External IC1' */
  DW_UnitDelayExternalIC1_BSPR__T UnitDelayExternalIC1;/* '<S129>/Unit Delay External IC1' */
  DW_InputValueCalc1_BSPR_CellV_T sf_InputValueCalc1_f;/* '<S122>/InputValueCalc1' */
  DW_MaxValue_sort_BSPR_CellVol_T sf_MinValue_sort;/* '<S99>/MinValue_sort' */
  DW_InputValueCalc_BSPR_CellVo_T sf_InputValueCalc_d;/* '<S99>/InputValueCalc' */
  DW_InputValueCalc1_BSPR_CellV_T sf_InputValueCalc1;/* '<S112>/InputValueCalc1' */
  DW_MaxValue_sort_BSPR_CellVol_T sf_MaxValue_sort;/* '<S98>/MaxValue_sort' */
  DW_InputValueCalc_BSPR_CellVo_T sf_InputValueCalc;/* '<S98>/InputValueCalc' */
  DW_VoltProcBMSDebounceStartZe_T VoltProcBMSDebounceStartZero2;/* '<S8>/VoltProcBMSDebounceStartZero2' */
  DW_VoltProcBMSDebounceStartZe_T VoltProcBMSDebounceStartZero1;/* '<S8>/VoltProcBMSDebounceStartZero1' */
} DW_BSPR_CellVoltCoord_T;

/* Block signals (auto storage) */
extern B_BSPR_CellVoltCoord_T BSPR_CellVoltCoord_B;

/* Block states (auto storage) */
extern DW_BSPR_CellVoltCoord_T BSPR_CellVoltCoord_DW;

/* Model entry point functions */
extern void BSPR_CellVoltCoord_initialize(void);
extern void BSPR_CellVoltCoord_step(void);

/* Exported data declaration */

/* Volatile memory section */
#define ASW1_OEM_START_SEC_DEFAULT_RAM2_CLEARED_UNSPECIFIED
#include "Asw1_OEM_MemMap.h"

/* Declaration for custom storage class: Volatile */
extern volatile uint8_T DFC_CellVoltRngHiErr_ASW;/* Max fault for cell voltage invalid signal */
extern volatile uint8_T DFC_CellVoltRngLoErr_ASW;/* Min fault for cell voltage invalid signal */
extern volatile uint8_T DFC_CellVoltVldMax_ASW;/* Max fault for cell voltage invalid signal */
extern volatile uint8_T DFC_CellVoltVldMin_ASW;/* Min fault for cell voltage invalid signal */

#define ASW1_OEM_STOP_SEC_DEFAULT_RAM2_CLEARED_UNSPECIFIED
#include "Asw1_OEM_MemMap.h"
#define ASW1_OEM_START_SEC_DEFAULT_RAM2_CLEARED_UNSPECIFIED
#include "Asw1_OEM_MemMap.h"

/* Declaration for custom storage class: OutputSignal */
extern volatile boolean_T BSPR_bCellVoltElecNorm;/* Wire status for for cell voltage signal */
extern volatile boolean_T BSPR_bCellVoltRngHiErr;/* Wire status for for cell voltage signal */
extern volatile boolean_T BSPR_bCellVoltRngHiOk;/* Wire status for for cell voltage signal */
extern volatile boolean_T BSPR_bCellVoltRngLoErr;/* Wire status for for cell voltage signal */
extern volatile boolean_T BSPR_bCellVoltRngLoOk;/* Wire status for for cell voltage signal */
extern volatile uint8_T BSPR_cntCellSerNum;/* number of cell series  in current battery package */
extern volatile uint8_T BSPR_cntSumCellVoltInvld;/* Calculated total invalid signal of cell voltage */
extern volatile uint8_T BSPR_idxCellVoltMax;/* Calculated index of max cell voltage  */
extern volatile uint8_T BSPR_idxCellVoltMin;/* Calculated index of min cell voltage */
extern volatile real32_T BSPR_uCellVoltAvrg;/* Calculated average cell voltage */
extern volatile real32_T BSPR_uCellVoltMax;/* Calculated max cell voltage */
extern volatile real32_T BSPR_uCellVoltMax2CAN;
extern volatile real32_T BSPR_uCellVoltMin;/* Calculated min cell voltage */
extern volatile real32_T BSPR_uCellVoltMin2CAN;
extern volatile real32_T BSPR_uCellVolt_A[150];/* Calculated cell voltage after coordinating */

#define ASW1_OEM_STOP_SEC_DEFAULT_RAM2_CLEARED_UNSPECIFIED
#include "Asw1_OEM_MemMap.h"

/*-
 * The generated code includes comments that allow you to trace directly
 * back to the appropriate location in the model.  The basic format
 * is <system>/block_name, where system is the system number (uniquely
 * assigned by Simulink) and block_name is the name of the block.
 *
 * Use the MATLAB hilite_system command to trace the generated code back
 * to the model.  For example,
 *
 * hilite_system('<S3>')    - opens system 3
 * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
 *
 * Here is the system hierarchy for this model
 *
 * '<Root>' : 'BSPR_CellVoltCoord'
 * '<S1>'   : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord'
 * '<S2>'   : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc'
 * '<S3>'   : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCoord'
 * '<S4>'   : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglProc'
 * '<S5>'   : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/Chart'
 * '<S6>'   : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/Chart1'
 * '<S7>'   : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/Chart2'
 * '<S8>'   : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk'
 * '<S9>'   : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk'
 * '<S10>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys'
 * '<S11>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/Hysteresis'
 * '<S12>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/Subsystem1'
 * '<S13>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/Subsystem10'
 * '<S14>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/Subsystem2'
 * '<S15>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/Subsystem3'
 * '<S16>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/Subsystem4'
 * '<S17>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/Subsystem5'
 * '<S18>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/Subsystem6'
 * '<S19>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/Subsystem7'
 * '<S20>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/Subsystem8'
 * '<S21>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/Subsystem9'
 * '<S22>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCalc/uCellVoltAvrgFil'
 * '<S23>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCoord/CellVoltSglCoord'
 * '<S24>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCoord/Subsystem'
 * '<S25>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglCoord/Subsystem1'
 * '<S26>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/CellVoltSglProc/CellVoltSglProc'
 * '<S27>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/Compare To Constant1'
 * '<S28>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/Compare To Constant2'
 * '<S29>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck'
 * '<S30>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck1'
 * '<S31>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero1'
 * '<S32>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero2'
 * '<S33>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck/Bit Clear1'
 * '<S34>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck/Bit Clear2'
 * '<S35>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck/Bit Set'
 * '<S36>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck/Bit Set1'
 * '<S37>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck/Bit Set2'
 * '<S38>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck/Bit Set4'
 * '<S39>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck1/Bit Clear1'
 * '<S40>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck1/Bit Clear2'
 * '<S41>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck1/Bit Set'
 * '<S42>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck1/Bit Set1'
 * '<S43>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck1/Bit Set2'
 * '<S44>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/DSM_ReportCheck1/Bit Set4'
 * '<S45>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero1/Compare To Zero'
 * '<S46>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero1/FaultProcess'
 * '<S47>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero1/HealProcess'
 * '<S48>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero1/FaultProcess/Decrease'
 * '<S49>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero1/FaultProcess/Increase'
 * '<S50>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero1/FaultProcess/Decrease/Nomal'
 * '<S51>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero1/HealProcess/Compare To Zero'
 * '<S52>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero1/HealProcess/Decrease'
 * '<S53>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero1/HealProcess/Increase'
 * '<S54>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero1/HealProcess/Decrease/Nomal'
 * '<S55>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero2/Compare To Zero'
 * '<S56>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero2/FaultProcess'
 * '<S57>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero2/HealProcess'
 * '<S58>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero2/FaultProcess/Decrease'
 * '<S59>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero2/FaultProcess/Increase'
 * '<S60>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero2/FaultProcess/Decrease/Nomal'
 * '<S61>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero2/HealProcess/Compare To Zero'
 * '<S62>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero2/HealProcess/Decrease'
 * '<S63>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero2/HealProcess/Increase'
 * '<S64>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/RngChk/VoltProcBMSDebounceStartZero2/HealProcess/Decrease/Nomal'
 * '<S65>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/Compare To Constant'
 * '<S66>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/Compare To Constant1'
 * '<S67>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/Compare To Constant2'
 * '<S68>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/Compare To Constant3'
 * '<S69>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/Compare To Zero'
 * '<S70>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck'
 * '<S71>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck1'
 * '<S72>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/TONV_VariableTimeDebounce'
 * '<S73>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/TONV_VariableTimeDebounce1'
 * '<S74>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/TONV_VariableTimeDebounce2'
 * '<S75>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck/Bit Clear1'
 * '<S76>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck/Bit Clear2'
 * '<S77>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck/Bit Set'
 * '<S78>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck/Bit Set1'
 * '<S79>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck/Bit Set2'
 * '<S80>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck/Bit Set4'
 * '<S81>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck1/Bit Clear1'
 * '<S82>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck1/Bit Clear2'
 * '<S83>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck1/Bit Set'
 * '<S84>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck1/Bit Set1'
 * '<S85>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck1/Bit Set2'
 * '<S86>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VldChk/DSM_ReportCheck1/Bit Set4'
 * '<S87>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/CellVoltVld_Output'
 * '<S88>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/CellVolt_Output'
 * '<S89>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get'
 * '<S90>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/CellVolt_Output/CellVolt_SignalFilt'
 * '<S91>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/CellVolt_Output/CellVolt_SignalFilt/InputValueCalc'
 * '<S92>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/CellVolt_Output/CellVolt_SignalFilt/MaxValue_sort'
 * '<S93>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/CellVolt_Output/CellVolt_SignalFilt/SignalDelay1'
 * '<S94>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/CellVolt_Output/CellVolt_SignalFilt/SignalDelay1/Delay1Cycle'
 * '<S95>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/CellVolt_Output/CellVolt_SignalFilt/SignalDelay1/Delay2Cycle'
 * '<S96>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/CellVolt_Output/CellVolt_SignalFilt/SignalDelay1/Delay3Cycle'
 * '<S97>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/CellVolt_Output/CellVolt_SignalFilt/SignalDelay1/Delay4Cycle'
 * '<S98>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMax_SignalFilt'
 * '<S99>'  : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMin_SignalFilt'
 * '<S100>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/Limiter'
 * '<S101>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/Limiter1'
 * '<S102>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys'
 * '<S103>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys1'
 * '<S104>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1'
 * '<S105>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt2'
 * '<S106>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SumCellVoltVld'
 * '<S107>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/Sum_CellVolt_Get_Sys'
 * '<S108>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMax_SignalFilt/InputValueCalc'
 * '<S109>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMax_SignalFilt/MaxValue_sort'
 * '<S110>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMax_SignalFilt/SignalDelay1'
 * '<S111>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMax_SignalFilt/ValueCalc'
 * '<S112>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMax_SignalFilt/ValueIndexCalc'
 * '<S113>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMax_SignalFilt/SignalDelay1/Delay1Cycle'
 * '<S114>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMax_SignalFilt/SignalDelay1/Delay2Cycle'
 * '<S115>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMax_SignalFilt/SignalDelay1/Delay3Cycle'
 * '<S116>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMax_SignalFilt/SignalDelay1/Delay4Cycle'
 * '<S117>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMax_SignalFilt/ValueIndexCalc/InputValueCalc1'
 * '<S118>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMin_SignalFilt/InputValueCalc'
 * '<S119>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMin_SignalFilt/MinValue_sort'
 * '<S120>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMin_SignalFilt/SignalDelay1'
 * '<S121>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMin_SignalFilt/ValueCalc'
 * '<S122>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMin_SignalFilt/ValueIndexCalc'
 * '<S123>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMin_SignalFilt/SignalDelay1/Delay1Cycle'
 * '<S124>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMin_SignalFilt/SignalDelay1/Delay2Cycle'
 * '<S125>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMin_SignalFilt/SignalDelay1/Delay3Cycle'
 * '<S126>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMin_SignalFilt/SignalDelay1/Delay4Cycle'
 * '<S127>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/CellVoltMin_SignalFilt/ValueIndexCalc/InputValueCalc1'
 * '<S128>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys/MaxMin_CellVolt_ForIterator'
 * '<S129>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys/MaxMin_CellVolt_ForIterator/MaxCellVoltNumb_ForIterator'
 * '<S130>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys/MaxMin_CellVolt_ForIterator/MinCellVoltNumb_ForIterator'
 * '<S131>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys/MaxMin_CellVolt_ForIterator/MaxCellVoltNumb_ForIterator/Unit Delay External IC1'
 * '<S132>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys/MaxMin_CellVolt_ForIterator/MinCellVoltNumb_ForIterator/Unit Delay External IC1'
 * '<S133>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys/MaxMin_CellVolt_ForIterator/MinCellVoltNumb_ForIterator/Unit Delay External IC2'
 * '<S134>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys1/MaxMin_CellVolt_ForIterator'
 * '<S135>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys1/MaxMin_CellVolt_ForIterator/MaxCellVoltNumb_ForIterator'
 * '<S136>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys1/MaxMin_CellVolt_ForIterator/MinCellVoltNumb_ForIterator'
 * '<S137>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/MaxMin_CellVolt_Get_Sys1/MaxMin_CellVolt_ForIterator/MaxCellVoltNumb_ForIterator/Unit Delay External IC1'
 * '<S138>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1/MaxCellVolt_sort'
 * '<S139>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1/SignalDelay1'
 * '<S140>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1/SignalDelay2'
 * '<S141>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1/SignalDelay1/Delay1Cycle'
 * '<S142>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1/SignalDelay1/Delay2Cycle'
 * '<S143>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1/SignalDelay1/Delay3Cycle'
 * '<S144>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1/SignalDelay1/Delay4Cycle'
 * '<S145>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1/SignalDelay2/Delay1Cycle'
 * '<S146>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1/SignalDelay2/Delay2Cycle'
 * '<S147>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1/SignalDelay2/Delay3Cycle'
 * '<S148>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt1/SignalDelay2/Delay4Cycle'
 * '<S149>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt2/InputValueCalc'
 * '<S150>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt2/MaxValue_sort'
 * '<S151>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt2/SignalDelay1'
 * '<S152>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt2/ValueCalc'
 * '<S153>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt2/ValueIndexCalc'
 * '<S154>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt2/SignalDelay1/Delay1Cycle'
 * '<S155>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt2/SignalDelay1/Delay2Cycle'
 * '<S156>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt2/SignalDelay1/Delay3Cycle'
 * '<S157>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt2/SignalDelay1/Delay4Cycle'
 * '<S158>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SignalFilt2/ValueIndexCalc/InputValueCalc1'
 * '<S159>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SumCellVoltVld/CellVoltUpdate'
 * '<S160>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SumCellVoltVld/CellVoltVld'
 * '<S161>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SumCellVoltVld/Subsystem'
 * '<S162>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/SumCellVoltVld/Subsystem/BMSDelay'
 * '<S163>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/Sum_CellVolt_Get_Sys/SumCellVot_Calculation'
 * '<S164>' : 'BSPR_CellVoltCoord/BSPR_CellVoltCoord/VoltDataPrc_20ms_sys/MaxMinSum_CellVolt_Get/Sum_CellVolt_Get_Sys/Sum_CellVolt_ForIterator'
 */
#endif                                 /* RTW_HEADER_BSPR_CellVoltCoord_h_ */

/*
 * File trailer for generated code.
 *
 * [EOF]
 */
