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/*
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* File: BSER_CmuLost.c
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*
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* Code generated for Simulink model 'BSER_CmuLost'.
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*
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* Model version : 1.1407
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* C/C++ source code generated on : Tue Jul 28 10:51:17 2020
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*
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* Target selection: ert.tlc
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* Embedded hardware selection: Infineon->TriCore
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* Code generation objectives:
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* 1. MISRA C:2012 guidelines
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* 2. Execution efficiency
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* Validation result: Not run
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*/
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#include "BSER_CmuLost.h"
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#include "BSER_CmuLost_private.h"
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/* Exported data definition */
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/* Volatile memory section */
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/* Definition for custom storage class: Volatile */
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volatile
uint8_T
DFC_ChrgCmuLost
;
/* Max fault of battery soc out of range high */
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volatile
uint8_T
DFC_DisChrgCmuLost
;
/* Min fault of battery soc out of range high */
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/* Block states (auto storage) */
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DW_BSER_CmuLost_T
BSER_CmuLost_DW
;
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/* Model step function */
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void
BSER_CmuLost_step
(
void
)
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{
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boolean_T
rtb_RelationalOperator2
;
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boolean_T
rtb_LogicalOperator2
;
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real32_T
rtb_Product_e
;
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real32_T
rtb_Product_h
;
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uint8_T
rtb_Switch4_j
;
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real32_T
rtb_RelationalOperator2_0
;
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rtb_RelationalOperator2
= (0
==
IoExtMc33771_ChkCIDCycSt
);
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if
(
rtb_RelationalOperator2
)
{
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rtb_RelationalOperator2_0
= 0.01F;
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}
else
{
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rtb_RelationalOperator2_0
= 0.0F;
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}
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if
(
BSER_tiBattDisChrgCmuLost_C
<
BSER_CmuLost_DW
.
Delay_DSTATE_p
)
{
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rtb_Product_h
=
BSER_tiBattDisChrgCmuLost_C
;
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}
else
{
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rtb_Product_h
=
BSER_CmuLost_DW
.
Delay_DSTATE_p
;
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}
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rtb_Product_e
= (
rtb_RelationalOperator2_0
+
rtb_Product_h
)
*
(
real32_T
)
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rtb_RelationalOperator2
;
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BSER_CmuLost_DW
.
Delay_DSTATE_p
=
rtb_Product_e
;
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rtb_LogicalOperator2
=
!
rtb_RelationalOperator2
;
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if
(
rtb_LogicalOperator2
)
{
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rtb_RelationalOperator2_0
= 0.01F;
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}
else
{
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rtb_RelationalOperator2_0
= 0.0F;
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}
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if
(
BSER_tiBattDisChrgCmuLost_C
<
BSER_CmuLost_DW
.
Delay_DSTATE_g
)
{
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rtb_Product_h
=
BSER_tiBattDisChrgCmuLost_C
;
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}
else
{
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rtb_Product_h
=
BSER_CmuLost_DW
.
Delay_DSTATE_g
;
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}
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rtb_Product_h
= (
rtb_RelationalOperator2_0
+
rtb_Product_h
)
*
(
real32_T
)
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rtb_LogicalOperator2
;
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BSER_CmuLost_DW
.
Delay_DSTATE_g
=
rtb_Product_h
;
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if
(
BSER_CmuLost_DW
.
Delay2_DSTATE_j
)
{
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rtb_Switch4_j
= (
uint8_T
)
~
(
uint8_T
)((
uint8_T
)
~
DFC_DisChrgCmuLost
|
8U);
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}
else
if
(
rtb_Product_e
>
BSER_tiBattDisChrgCmuLost_C
)
{
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rtb_Switch4_j
= (
uint8_T
)(
DFC_DisChrgCmuLost
|
152U);
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}
else
if
(
rtb_Product_h
>
BSER_tiBattDisChrgCmuLost_C
)
{
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rtb_Switch4_j
= (
uint8_T
)((
uint8_T
)
~
(
uint8_T
)((
uint8_T
)
~
DFC_DisChrgCmuLost
|
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16U)
|
8U);
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}
else
{
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rtb_Switch4_j
=
BSER_CmuLost_DW
.
Delay3_DSTATE_l
;
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}
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BSER_CmuLost_DW
.
Delay2_DSTATE_j
= false;
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BSER_CmuLost_DW
.
Delay3_DSTATE_l
=
rtb_Switch4_j
;
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DFC_DisChrgCmuLost
=
rtb_Switch4_j
;
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rtb_RelationalOperator2
= (
rtb_RelationalOperator2
&&
((
BCMR_stDChrgMode
==
3)
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||
(8
==
BCMR_stAChrgObsr
)
||
(
BCMR_stAChrgObsr
==
7)));
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if
(
rtb_RelationalOperator2
)
{
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rtb_RelationalOperator2_0
= 0.01F;
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}
else
{
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rtb_RelationalOperator2_0
= 0.0F;
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}
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if
(
BSER_tiBattChrgCmuLost_C
<
BSER_CmuLost_DW
.
Delay_DSTATE_m
)
{
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rtb_Product_h
=
BSER_tiBattChrgCmuLost_C
;
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}
else
{
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rtb_Product_h
=
BSER_CmuLost_DW
.
Delay_DSTATE_m
;
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}
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rtb_Product_e
= (
rtb_RelationalOperator2_0
+
rtb_Product_h
)
*
(
real32_T
)
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rtb_RelationalOperator2
;
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BSER_CmuLost_DW
.
Delay_DSTATE_m
=
rtb_Product_e
;
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rtb_RelationalOperator2
=
!
rtb_RelationalOperator2
;
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if
(
rtb_RelationalOperator2
)
{
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rtb_RelationalOperator2_0
= 0.01F;
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}
else
{
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rtb_RelationalOperator2_0
= 0.0F;
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}
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if
(
BSER_tiBattChrgCmuLost_C
<
BSER_CmuLost_DW
.
Delay_DSTATE
)
{
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rtb_Product_h
=
BSER_tiBattChrgCmuLost_C
;
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}
else
{
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rtb_Product_h
=
BSER_CmuLost_DW
.
Delay_DSTATE
;
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}
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rtb_Product_h
= (
rtb_RelationalOperator2_0
+
rtb_Product_h
)
*
(
real32_T
)
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rtb_RelationalOperator2
;
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BSER_CmuLost_DW
.
Delay_DSTATE
=
rtb_Product_h
;
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if
(
BSER_CmuLost_DW
.
Delay2_DSTATE
)
{
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rtb_Switch4_j
= (
uint8_T
)
~
(
uint8_T
)((
uint8_T
)
~
DFC_ChrgCmuLost
|
8U);
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}
else
if
(
rtb_Product_e
>
BSER_tiBattChrgCmuLost_C
)
{
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rtb_Switch4_j
= (
uint8_T
)(
DFC_ChrgCmuLost
|
152U);
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}
else
if
(
rtb_Product_h
>
BSER_tiBattChrgCmuLost_C
)
{
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rtb_Switch4_j
= (
uint8_T
)((
uint8_T
)
~
(
uint8_T
)((
uint8_T
)
~
DFC_ChrgCmuLost
|
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16U)
|
8U);
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}
else
{
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rtb_Switch4_j
=
BSER_CmuLost_DW
.
Delay3_DSTATE
;
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}
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BSER_CmuLost_DW
.
Delay2_DSTATE
= false;
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BSER_CmuLost_DW
.
Delay3_DSTATE
=
rtb_Switch4_j
;
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DFC_ChrgCmuLost
=
rtb_Switch4_j
;
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}
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/* Model initialize function */
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void
BSER_CmuLost_initialize
(
void
)
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{
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BSER_CmuLost_DW
.
Delay2_DSTATE_j
= true;
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BSER_CmuLost_DW
.
Delay2_DSTATE
= true;
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}
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/*
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* File trailer for generated code.
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*
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* [EOF]
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*/
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