| 1 | /* |
| 2 | * File: SocParameter.c |
| 3 | * |
| 4 | * Code generated for Simulink model 'BSER_BattSocCalc'. |
| 5 | * |
| 6 | * Model version : 'M1.5.6' |
| 7 | * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017 |
| 8 | * C/C++ source code generated on : Wed Jul 7 17:01:26 2021 |
| 9 | * |
| 10 | * Target selection: ert.tlc |
| 11 | * Embedded hardware selection: Infineon->TriCore |
| 12 | * Code generation objectives: |
| 13 | * 1. MISRA C:2012 guidelines |
| 14 | * 2. Execution efficiency |
| 15 | * Validation result: Not run |
| 16 | */ |
| 17 | |
| 18 | #include "rtwtypes.h" |
| 19 | #include "BSER_BattSocCalc_types.h" |
| 20 | |
| 21 | /* Exported data definition */ |
| 22 | #define ASW1_OEM_START_SEC_DEFAULT_CALIB_UNSPECIFIED |
| 23 | #include "Asw1_OEM_MemMap.h" |
| 24 | |
| 25 | /* Definition for custom storage class: Const */ |
| 26 | const volatile boolean_T BCMR_bChrgFulVldFlg_C = 1; |
| 27 | const volatile real32_T BESR_iOcvRevThres_C = 0.1F; |
| 28 | const volatile real32_T BESR_numSocSaveFlgStep_C = 75.0F; |
| 29 | const volatile real32_T BESR_numSocSaveStep_C = 3.0F; |
| 30 | const volatile real32_T BSER_LowSocCorCurrThres1_C = 10.0F; |
| 31 | const volatile real32_T BSER_LowSocCorLowCellVoltThres1_C = 1.5F; |
| 32 | const volatile real32_T BSER_LowSocCorMinSOC1_C = 0.0F; |
| 33 | const volatile real32_T BSER_PackSocCorMaxSOC_C = 90.0F; |
| 34 | const volatile real32_T BSER_PackSocCorMinSOC_C = 10.0F; |
| 35 | const volatile real32_T BSER_RealSocZeroTemp_C = -50.0F; |
| 36 | const volatile uint32_T BSER_SOCOdoTableOdo_C[10] = { 0U, 1U, 12U, 15U, 20U, 25U, |
| 37 | 30U, 35U, 40U, 45U } ; |
| 38 | |
| 39 | const volatile real32_T BSER_SOCOdoTableSOC_C[10] = { 97.0F, 97.0F, 97.0F, 97.0F, |
| 40 | 97.0F, 97.0F, 97.0F, 97.0F, 97.0F, 97.0F } ; |
| 41 | |
| 42 | const volatile real32_T BSER_SocCorMinValue_C = 1.1F; |
| 43 | const volatile real32_T BSER_ahBattCap_C = 177.0F; |
| 44 | const volatile boolean_T BSER_bBattCapVldFlg_C = 1; |
| 45 | const volatile boolean_T BSER_bSocResetCmd_C = 0; |
| 46 | const volatile real32_T BSER_cSocAhFulHldThres_C = 1.0F; |
| 47 | const volatile real32_T BSER_cntSocBmsStsDel_C = 1500.0F; |
| 48 | const volatile uint8_T BSER_cntSocStbNum_C = 5U; |
| 49 | const volatile real32_T BSER_facColmB_C = 1.0F; |
| 50 | const volatile real32_T BSER_iRunIniCurrThres_C = 2.0F; |
| 51 | const volatile real32_T BSER_iSocCurrEff_C = 0.1F; |
| 52 | const volatile real32_T BSER_iSocHoldCurrThres_C = 0.1F; |
| 53 | const volatile uint32_T BSER_numRunCorrHit_C = 90000U; |
| 54 | const volatile real32_T BSER_numSocCorHighCellVoltThres_C = 4.5F; |
| 55 | const volatile real32_T BSER_numSocCorLowCellVoltThres_C = 2.0F; |
| 56 | const volatile real32_T BSER_rChgDsplSocFast_C = 2.0F; |
| 57 | const volatile real32_T BSER_rChgDsplSocSlow_C = 0.5F; |
| 58 | const volatile real32_T BSER_rDisChDsplSocFast_C = 2.0F; |
| 59 | const volatile real32_T BSER_rDisChDsplSocSlow_C = 0.5F; |
| 60 | const volatile real32_T BSER_rDsplSocDiffAllowThres_C = 0.5F; |
| 61 | const volatile real32_T BSER_rDsplSocFilter_C = 0.01F; |
| 62 | const volatile real32_T BSER_rDsplSocNrm_C = 1.031F; |
| 63 | const volatile real32_T BSER_rDsplSocRSoc_A[17] = { 0.0F, 5.0F, 10.0F, 11.0F, |
| 64 | 14.0F, 16.0F, 20.0F, 23.0F, 30.0F, 40.0F, 50.0F, 60.0F, 70.0F, 80.0F, 90.0F, |
| 65 | 97.0F, 100.0F } ; |
| 66 | |
| 67 | const volatile real32_T BSER_rDsplSocRSoc_MAP[119] = { 0.0F, 0.0F, 0.0F, 0.0F, |
| 68 | 0.0F, 0.0F, 0.773195863F, 4.63917542F, 13.6597939F, 26.5463924F, 39.432991F, |
| 69 | 52.3195877F, 65.2061844F, 78.0927811F, 90.9793777F, 100.0F, 100.0F, 0.0F, 0.0F, |
| 70 | 0.0F, 0.0F, 0.0F, 4.02329636F, 8.762887F, 12.3175793F, 20.6118622F, |
| 71 | 32.4608383F, 44.3098145F, 56.1587906F, 68.0077667F, 79.8567429F, 91.705719F, |
| 72 | 100.0F, 100.0F, 0.0F, 0.0F, 0.0F, 1.48911798F, 4.92554426F, 7.21649504F, |
| 73 | 11.7983961F, 15.2348223F, 23.2531509F, 34.7079048F, 46.1626587F, 57.6174126F, |
| 74 | 69.0721664F, 80.5269165F, 91.9816742F, 100.0F, 100.0F, 0.0F, 0.0F, 3.55250478F, |
| 75 | 4.66109657F, 7.9868722F, 10.2040558F, 14.6384239F, 17.9642F, 25.7243423F, |
| 76 | 36.8102608F, 47.8961792F, 58.9821F, 70.0680161F, 81.1539383F, 92.2398529F, |
| 77 | 100.0F, 100.0F, 0.0F, 0.0F, 3.55250478F, 4.66109657F, 7.9868722F, 10.2040558F, |
| 78 | 14.6384239F, 17.9642F, 25.7243423F, 36.8102608F, 47.8961792F, 58.9821F, |
| 79 | 70.0680161F, 81.1539383F, 92.2398529F, 100.0F, 100.0F, 0.0F, 5.15463924F, |
| 80 | 10.3092785F, 11.3402061F, 14.4329901F, 16.4948444F, 20.618557F, 23.71134F, |
| 81 | 30.9278355F, 41.237114F, 51.5463905F, 61.8556709F, 72.1649475F, 82.4742279F, |
| 82 | 92.7835083F, 100.0F, 100.0F, 0.0F, 5.15463924F, 10.3092785F, 11.3402061F, |
| 83 | 14.4329901F, 16.4948444F, 20.618557F, 23.71134F, 30.9278355F, 41.237114F, |
| 84 | 51.5463905F, 61.8556709F, 72.1649475F, 82.4742279F, 92.7835083F, 100.0F, |
| 85 | 100.0F } ; /* dspl_SOC mapping with real_SOC */ |
| 86 | |
| 87 | const volatile real32_T BSER_rInitDSocDiffThres_C = 20.0F; |
| 88 | const volatile real32_T BSER_rInitRSocDiffThres_C = 8.0F; |
| 89 | const volatile real32_T BSER_rRSocLowLimit_C = 0.0F; |
| 90 | const volatile real32_T BSER_rSocOCV_MAP[112] = { 0.0F, 0.03F, 0.05F, 0.1F, |
| 91 | 0.15F, 0.2F, 0.3F, 0.4F, 0.5F, 0.6F, 0.7F, 0.8F, 0.9F, 0.95F, 0.97F, 1.0F, |
| 92 | 0.0F, 0.03F, 0.05F, 0.1F, 0.15F, 0.2F, 0.3F, 0.4F, 0.5F, 0.6F, 0.7F, 0.8F, |
| 93 | 0.9F, 0.95F, 0.97F, 1.0F, 0.0F, 0.03F, 0.05F, 0.1F, 0.15F, 0.2F, 0.3F, 0.4F, |
| 94 | 0.5F, 0.6F, 0.7F, 0.8F, 0.9F, 0.95F, 0.97F, 1.0F, 0.0F, 0.03F, 0.05F, 0.1F, |
| 95 | 0.15F, 0.2F, 0.3F, 0.4F, 0.5F, 0.6F, 0.7F, 0.8F, 0.9F, 0.95F, 0.97F, 1.0F, |
| 96 | 0.0F, 0.03F, 0.05F, 0.1F, 0.15F, 0.2F, 0.3F, 0.4F, 0.5F, 0.6F, 0.7F, 0.8F, |
| 97 | 0.9F, 0.95F, 0.97F, 1.0F, 0.0F, 0.03F, 0.05F, 0.1F, 0.15F, 0.2F, 0.3F, 0.4F, |
| 98 | 0.5F, 0.6F, 0.7F, 0.8F, 0.9F, 0.95F, 0.97F, 1.0F, 0.0F, 0.03F, 0.05F, 0.1F, |
| 99 | 0.15F, 0.2F, 0.3F, 0.4F, 0.5F, 0.6F, 0.7F, 0.8F, 0.9F, 0.95F, 0.97F, 1.0F } ;/* soc mapping with OCV & temprature */ |
| 100 | |
| 101 | const volatile real32_T BSER_tBattDsplSocTemp_A[7] = { -30.0F, -20.0F, -10.0F, |
| 102 | 0.0F, 10.0F, 25.0F, 45.0F } ; |
| 103 | |
| 104 | const volatile real32_T BSER_tSocOCVTemp_A[7] = { -30.0F, -20.0F, -10.0F, 0.0F, |
| 105 | 10.0F, 25.0F, 45.0F } ; |
| 106 | |
| 107 | const volatile real32_T BSER_tiDsplSocStoptimeThres_C = 10080.0F; |
| 108 | const volatile real32_T BSER_tiFullChgtFusf_C = 0.1F; |
| 109 | const volatile real32_T BSER_tiInputFualtFusf_C = 0.2F; |
| 110 | const volatile real32_T BSER_tiLowSOCCor1_C = 6.0F; |
| 111 | const volatile real32_T BSER_tiSocRunT_C = 20.0F; |
| 112 | const volatile real32_T BSER_tiSocStep_C = 0.02F; |
| 113 | const volatile real32_T BSER_tiStoptimeThres_C = 30.0F; |
| 114 | const volatile real32_T BSER_uMinCellVoltTemp[10] = { -30.0F, -20.0F, -10.0F, |
| 115 | 0.0F, 10.0F, 20.0F, 30.0F, 40.0F, 50.0F, 60.0F } ; |
| 116 | |
| 117 | const volatile real32_T BSER_uSOCOneVolt_MAP[10] = { 3.3F, 3.3F, 3.3F, 3.3F, |
| 118 | 3.3F, 3.3F, 3.3F, 3.3F, 3.3F, 3.3F } ; |
| 119 | |
| 120 | const volatile real32_T BSER_uSOCZeorVolt_MAP[10] = { 2.9F, 2.9F, 3.0F, 3.0F, |
| 121 | 3.1F, 3.2F, 3.2F, 3.2F, 3.2F, 3.2F } ; |
| 122 | |
| 123 | const volatile real32_T BSER_uSocOCV_A[16] = { 3.457F, 3.474F, 3.491F, 3.534F, |
| 124 | 3.567F, 3.6F, 3.637F, 3.672F, 3.731F, 3.839F, 3.947F, 4.063F, 4.179F, 4.236F, |
| 125 | 4.268F, 4.317F } ; /* SOV-OCV mapping with OCV points */ |
| 126 | |
| 127 | const volatile boolean_T BSPR_bCellVoltVldFlg_C = 1; |
| 128 | const volatile boolean_T BSPR_bCurrVldFlg_C = 1; |
| 129 | const volatile boolean_T DSMR_bFaultRankVldFlg_C = 1; |
| 130 | |
| 131 | #define ASW1_OEM_STOP_SEC_DEFAULT_CALIB_UNSPECIFIED |
| 132 | #include "Asw1_OEM_MemMap.h" |
| 133 | |
| 134 | /* |
| 135 | * File trailer for generated code. |
| 136 | * |
| 137 | * [EOF] |
| 138 | */ |
| 139 | |