1/*
2 * File: BSER_CmuLost.c
3 *
4 * Code generated for Simulink model 'BSER_CmuLost'.
5 *
6 * Model version : 1.1407
7 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
8 * C/C++ source code generated on : Tue Jul 28 10:51:17 2020
9 *
10 * Target selection: ert.tlc
11 * Embedded hardware selection: Infineon->TriCore
12 * Code generation objectives:
13 * 1. MISRA C:2012 guidelines
14 * 2. Execution efficiency
15 * Validation result: Not run
16 */
17
18#include "BSER_CmuLost.h"
19#include "BSER_CmuLost_private.h"
20
21/* Exported data definition */
22
23/* Volatile memory section */
24/* Definition for custom storage class: Volatile */
25volatile uint8_T DFC_ChrgCmuLost; /* Max fault of battery soc out of range high */
26volatile uint8_T DFC_DisChrgCmuLost; /* Min fault of battery soc out of range high */
27
28/* Block states (auto storage) */
29DW_BSER_CmuLost_T BSER_CmuLost_DW;
30
31/* Model step function */
32void BSER_CmuLost_step(void)
33{
34 boolean_T rtb_RelationalOperator2;
35 boolean_T rtb_LogicalOperator2;
36 real32_T rtb_Product_e;
37 real32_T rtb_Product_h;
38 uint8_T rtb_Switch4_j;
39 real32_T rtb_RelationalOperator2_0;
40 rtb_RelationalOperator2 = (0 == IoExtMc33771_ChkCIDCycSt);
41 if (rtb_RelationalOperator2) {
42 rtb_RelationalOperator2_0 = 0.01F;
43 } else {
44 rtb_RelationalOperator2_0 = 0.0F;
45 }
46
47 if (BSER_tiBattDisChrgCmuLost_C < BSER_CmuLost_DW.Delay_DSTATE_p) {
48 rtb_Product_h = BSER_tiBattDisChrgCmuLost_C;
49 } else {
50 rtb_Product_h = BSER_CmuLost_DW.Delay_DSTATE_p;
51 }
52
53 rtb_Product_e = (rtb_RelationalOperator2_0 + rtb_Product_h) * (real32_T)
54 rtb_RelationalOperator2;
55 BSER_CmuLost_DW.Delay_DSTATE_p = rtb_Product_e;
56 rtb_LogicalOperator2 = !rtb_RelationalOperator2;
57 if (rtb_LogicalOperator2) {
58 rtb_RelationalOperator2_0 = 0.01F;
59 } else {
60 rtb_RelationalOperator2_0 = 0.0F;
61 }
62
63 if (BSER_tiBattDisChrgCmuLost_C < BSER_CmuLost_DW.Delay_DSTATE_g) {
64 rtb_Product_h = BSER_tiBattDisChrgCmuLost_C;
65 } else {
66 rtb_Product_h = BSER_CmuLost_DW.Delay_DSTATE_g;
67 }
68
69 rtb_Product_h = (rtb_RelationalOperator2_0 + rtb_Product_h) * (real32_T)
70 rtb_LogicalOperator2;
71 BSER_CmuLost_DW.Delay_DSTATE_g = rtb_Product_h;
72 if (BSER_CmuLost_DW.Delay2_DSTATE_j) {
73 rtb_Switch4_j = (uint8_T)~(uint8_T)((uint8_T)~DFC_DisChrgCmuLost | 8U);
74 } else if (rtb_Product_e > BSER_tiBattDisChrgCmuLost_C) {
75 rtb_Switch4_j = (uint8_T)(DFC_DisChrgCmuLost | 152U);
76 } else if (rtb_Product_h > BSER_tiBattDisChrgCmuLost_C) {
77 rtb_Switch4_j = (uint8_T)((uint8_T)~(uint8_T)((uint8_T)~DFC_DisChrgCmuLost |
78 16U) | 8U);
79 } else {
80 rtb_Switch4_j = BSER_CmuLost_DW.Delay3_DSTATE_l;
81 }
82
83 BSER_CmuLost_DW.Delay2_DSTATE_j = false;
84 BSER_CmuLost_DW.Delay3_DSTATE_l = rtb_Switch4_j;
85 DFC_DisChrgCmuLost = rtb_Switch4_j;
86 rtb_RelationalOperator2 = (rtb_RelationalOperator2 && ((BCMR_stDChrgMode == 3)
87 || (8 == BCMR_stAChrgObsr) || (BCMR_stAChrgObsr == 7)));
88 if (rtb_RelationalOperator2) {
89 rtb_RelationalOperator2_0 = 0.01F;
90 } else {
91 rtb_RelationalOperator2_0 = 0.0F;
92 }
93
94 if (BSER_tiBattChrgCmuLost_C < BSER_CmuLost_DW.Delay_DSTATE_m) {
95 rtb_Product_h = BSER_tiBattChrgCmuLost_C;
96 } else {
97 rtb_Product_h = BSER_CmuLost_DW.Delay_DSTATE_m;
98 }
99
100 rtb_Product_e = (rtb_RelationalOperator2_0 + rtb_Product_h) * (real32_T)
101 rtb_RelationalOperator2;
102 BSER_CmuLost_DW.Delay_DSTATE_m = rtb_Product_e;
103 rtb_RelationalOperator2 = !rtb_RelationalOperator2;
104 if (rtb_RelationalOperator2) {
105 rtb_RelationalOperator2_0 = 0.01F;
106 } else {
107 rtb_RelationalOperator2_0 = 0.0F;
108 }
109
110 if (BSER_tiBattChrgCmuLost_C < BSER_CmuLost_DW.Delay_DSTATE) {
111 rtb_Product_h = BSER_tiBattChrgCmuLost_C;
112 } else {
113 rtb_Product_h = BSER_CmuLost_DW.Delay_DSTATE;
114 }
115
116 rtb_Product_h = (rtb_RelationalOperator2_0 + rtb_Product_h) * (real32_T)
117 rtb_RelationalOperator2;
118 BSER_CmuLost_DW.Delay_DSTATE = rtb_Product_h;
119 if (BSER_CmuLost_DW.Delay2_DSTATE) {
120 rtb_Switch4_j = (uint8_T)~(uint8_T)((uint8_T)~DFC_ChrgCmuLost | 8U);
121 } else if (rtb_Product_e > BSER_tiBattChrgCmuLost_C) {
122 rtb_Switch4_j = (uint8_T)(DFC_ChrgCmuLost | 152U);
123 } else if (rtb_Product_h > BSER_tiBattChrgCmuLost_C) {
124 rtb_Switch4_j = (uint8_T)((uint8_T)~(uint8_T)((uint8_T)~DFC_ChrgCmuLost |
125 16U) | 8U);
126 } else {
127 rtb_Switch4_j = BSER_CmuLost_DW.Delay3_DSTATE;
128 }
129
130 BSER_CmuLost_DW.Delay2_DSTATE = false;
131 BSER_CmuLost_DW.Delay3_DSTATE = rtb_Switch4_j;
132 DFC_ChrgCmuLost = rtb_Switch4_j;
133}
134
135/* Model initialize function */
136void BSER_CmuLost_initialize(void)
137{
138 BSER_CmuLost_DW.Delay2_DSTATE_j = true;
139 BSER_CmuLost_DW.Delay2_DSTATE = true;
140}
141
142/*
143 * File trailer for generated code.
144 *
145 * [EOF]
146 */
147