1/*
2 * File: BSER_BattSocCalc.h
3 *
4 * Code generated for Simulink model 'BSER_BattSocCalc'.
5 *
6 * Model version : 'M1.5.6'
7 * Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
8 * C/C++ source code generated on : Wed Jul 7 17:01:26 2021
9 *
10 * Target selection: ert.tlc
11 * Embedded hardware selection: Infineon->TriCore
12 * Code generation objectives:
13 * 1. MISRA C:2012 guidelines
14 * 2. Execution efficiency
15 * Validation result: Not run
16 */
17
18#ifndef RTW_HEADER_BSER_BattSocCalc_h_
19#define RTW_HEADER_BSER_BattSocCalc_h_
20#include <math.h>
21#include <string.h>
22#ifndef BSER_BattSocCalc_COMMON_INCLUDES_
23# define BSER_BattSocCalc_COMMON_INCLUDES_
24#include "rtwtypes.h"
25#endif /* BSER_BattSocCalc_COMMON_INCLUDES_ */
26
27#include "BSER_BattSocCalc_types.h"
28
29/* Includes for objects with custom storage classes. */
30#include "SocParameter.h"
31
32/* Macros for accessing real-time model data structure */
33
34/* user code (top of header file) */
35#include "ASW_Interface.h"
36
37/* Block signals (auto storage) */
38typedef struct {
39 real32_T Saturation3; /* '<S16>/Saturation3' */
40 real32_T Saturation; /* '<S16>/Saturation' */
41 real32_T Saturation1; /* '<S16>/Saturation1' */
42 real32_T Saturation2; /* '<S16>/Saturation2' */
43 real32_T Sum; /* '<S62>/Sum' */
44 real32_T Sum_o; /* '<S63>/Sum' */
45 real32_T Sum_op; /* '<S64>/Sum' */
46 real32_T Switch2; /* '<S72>/Switch2' */
47 real32_T In1; /* '<S61>/In1' */
48 boolean_T Initial_Enable; /* '<S18>/SOC State' */
49 boolean_T Ah_Enable; /* '<S18>/SOC State' */
50 boolean_T Fault_Enable; /* '<S18>/SOC State' */
51 boolean_T RunINI; /* '<S18>/SOC State' */
52 boolean_T bOcvRevHld; /* '<S18>/SOC State' */
53 boolean_T flag; /* '<S35>/Chart' */
54 boolean_T Q; /* '<S33>/RS' */
55} B_BSER_BattSocCalc_T;
56
57/* Block states (auto storage) for system '<Root>' */
58typedef struct {
59 real_T conter; /* '<S35>/Chart' */
60 real32_T Delay_DSTATE; /* '<S10>/Delay' */
61 real32_T Delay4_DSTATE; /* '<S1>/Delay4' */
62 real32_T Delay8_DSTATE; /* '<S1>/Delay8' */
63 real32_T Delay1_DSTATE; /* '<S1>/Delay1' */
64 real32_T Delay2_DSTATE; /* '<S1>/Delay2' */
65 real32_T Delay5_DSTATE; /* '<S1>/Delay5' */
66 real32_T Delay6_DSTATE; /* '<S1>/Delay6' */
67 real32_T Delay7_DSTATE; /* '<S1>/Delay7' */
68 real32_T Delay1_DSTATE_i; /* '<S17>/Delay1' */
69 real32_T Delay1_DSTATE_e; /* '<S19>/Delay1' */
70 real32_T Delay_DSTATE_l; /* '<S29>/Delay' */
71 real32_T Delay_DSTATE_e; /* '<S36>/Delay' */
72 real32_T Delay_DSTATE_p; /* '<S38>/Delay' */
73 real32_T Delay1_DSTATE_d; /* '<S8>/Delay1' */
74 real32_T Delay_DSTATE_j; /* '<S31>/Delay' */
75 real32_T Delay_DSTATE_b; /* '<S8>/Delay' */
76 real32_T Delay_DSTATE_i; /* '<S56>/Delay' */
77 real32_T Delay_DSTATE_iu; /* '<S57>/Delay' */
78 real32_T counter; /* '<S18>/SOC State' */
79 real32_T count; /* '<S18>/SOC State' */
80 real32_T cnt; /* '<S20>/Chart' */
81 uint8_T Delay1_DSTATE_h; /* '<S41>/Delay1' */
82 uint8_T Delay_DSTATE_g; /* '<S37>/Delay' */
83 uint8_T DelayInput1_DSTATE; /* '<S46>/Delay Input1' */
84 boolean_T Delay3_DSTATE; /* '<S1>/Delay3' */
85 boolean_T Delay_DSTATE_k; /* '<S19>/Delay' */
86 boolean_T Delay2_DSTATE_i; /* '<S19>/Delay2' */
87 boolean_T Delay1_DSTATE_j; /* '<S37>/Delay1' */
88 boolean_T Delay2_DSTATE_f; /* '<S38>/Delay2' */
89 boolean_T Delay1_DSTATE_iy; /* '<S36>/Delay1' */
90 boolean_T DelayInput1_DSTATE_h; /* '<S43>/Delay Input1' */
91 boolean_T Delay2_DSTATE_h; /* '<S35>/Delay2' */
92 boolean_T UnitDelay_DSTATE; /* '<S60>/Unit Delay' */
93 boolean_T UnitDelay_DSTATE_a; /* '<S55>/Unit Delay' */
94 boolean_T Delay1_DSTATE_dx; /* '<S48>/Delay1' */
95 boolean_T Delay1_DSTATE_g; /* '<S40>/Delay1' */
96 boolean_T Delay1_DSTATE_b; /* '<S44>/Delay1' */
97 uint8_T is_active_c1_BSER_BattSocCalc;/* '<S18>/SOC State' */
98 uint8_T is_c1_BSER_BattSocCalc; /* '<S18>/SOC State' */
99 uint8_T is_active_c3_BSER_BattSocCalc;/* '<S35>/Chart' */
100 uint8_T is_c3_BSER_BattSocCalc; /* '<S35>/Chart' */
101 uint8_T is_active_c2_BSER_BattSocCalc;/* '<S33>/RS' */
102 uint8_T is_active_c4_BSER_BattSocCalc;/* '<S20>/Chart' */
103 uint8_T is_c4_BSER_BattSocCalc; /* '<S20>/Chart' */
104 uint8_T is_active_c6_BSER_BattSocCalc;/* '<S41>/Chart' */
105 uint8_T is_c6_BSER_BattSocCalc; /* '<S41>/Chart' */
106 uint8_T i; /* '<S41>/Chart' */
107 uint8_T is_active_c5_BSER_BattSocCalc;/* '<S19>/Chart' */
108 uint8_T is_c5_BSER_BattSocCalc; /* '<S19>/Chart' */
109} DW_BSER_BattSocCalc_T;
110
111/* Invariant block signals (auto storage) */
112typedef struct {
113 const uint8_T DataTypeConversion1; /* '<S19>/Data Type Conversion1' */
114} ConstB_BSER_BattSocCalc_T;
115
116/* External outputs (root outports fed by signals with auto storage) */
117typedef struct {
118 boolean_T BSER_bSocVldFlg; /* '<Root>/BSER_bSocVldFlg' */
119} ExtY_BSER_BattSocCalc_T;
120
121/* Block signals (auto storage) */
122extern B_BSER_BattSocCalc_T BSER_BattSocCalc_B;
123
124/* Block states (auto storage) */
125extern DW_BSER_BattSocCalc_T BSER_BattSocCalc_DW;
126
127/* External outputs (root outports fed by signals with auto storage) */
128extern ExtY_BSER_BattSocCalc_T BSER_BattSocCalc_Y;
129extern const ConstB_BSER_BattSocCalc_T BSER_BattSocCalc_ConstB;/* constant block i/o */
130
131/* Model entry point functions */
132extern void BSER_BattSocCalc_initialize(void);
133extern void BSER_BattSocCalc_step(void);
134
135/* Exported data declaration */
136
137/* Volatile memory section */
138#define ASW1_OEM_START_SEC_DEFAULT_RAM1_CLEARED_UNSPECIFIED
139#include "Asw1_OEM_MemMap.h"
140
141/* Declaration for custom storage class: Volatile */
142extern volatile real32_T BSER_cSocDchAhFulRev;/* DchAh Since Full Rev Soc. */
143extern volatile real32_T BSER_rSocAvrg;
144extern volatile real32_T BSER_rSocMax;
145extern volatile real32_T BSER_rSocMin;
146extern volatile uint8_T BSER_stSocFulHld;
147
148#define ASW1_OEM_STOP_SEC_DEFAULT_RAM1_CLEARED_UNSPECIFIED
149#include "Asw1_OEM_MemMap.h"
150#define ASW1_OEM_START_SEC_DEFAULT_RAM1_CLEARED_UNSPECIFIED
151#include "Asw1_OEM_MemMap.h"
152
153/* Declaration for custom storage class: OutputSignal */
154extern volatile boolean_T BSER_DispSOCZero_flg;
155extern volatile real32_T BSER_LowSocCorLowCellVoltThres2_C;
156extern volatile real32_T BSER_LowSocCorLowCellVoltThres3_C;
157extern volatile boolean_T BSER_flgSocSave;
158extern volatile real32_T BSER_rRSocTableUpLimit_C;
159extern volatile real32_T BSER_rSoc;
160extern volatile real32_T BSER_rSocDspl;
161
162#define ASW1_OEM_STOP_SEC_DEFAULT_RAM1_CLEARED_UNSPECIFIED
163#include "Asw1_OEM_MemMap.h"
164
165/*-
166 * The generated code includes comments that allow you to trace directly
167 * back to the appropriate location in the model. The basic format
168 * is <system>/block_name, where system is the system number (uniquely
169 * assigned by Simulink) and block_name is the name of the block.
170 *
171 * Use the MATLAB hilite_system command to trace the generated code back
172 * to the model. For example,
173 *
174 * hilite_system('<S3>') - opens system 3
175 * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
176 *
177 * Here is the system hierarchy for this model
178 *
179 * '<Root>' : 'BSER_BattSocCalc'
180 * '<S1>' : 'BSER_BattSocCalc/BSER_SOC_V201'
181 * '<S2>' : 'BSER_BattSocCalc/BSER_SOC_V201/Compare To Constant'
182 * '<S3>' : 'BSER_BattSocCalc/BSER_SOC_V201/Compare To Constant1'
183 * '<S4>' : 'BSER_BattSocCalc/BSER_SOC_V201/Compare To Constant2'
184 * '<S5>' : 'BSER_BattSocCalc/BSER_SOC_V201/Compare To Constant3'
185 * '<S6>' : 'BSER_BattSocCalc/BSER_SOC_V201/Compare To Constant4'
186 * '<S7>' : 'BSER_BattSocCalc/BSER_SOC_V201/Compare To Constant8'
187 * '<S8>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output'
188 * '<S9>' : 'BSER_BattSocCalc/BSER_SOC_V201/CurrFilter'
189 * '<S10>' : 'BSER_BattSocCalc/BSER_SOC_V201/Debounce_COVhit'
190 * '<S11>' : 'BSER_BattSocCalc/BSER_SOC_V201/Limiter'
191 * '<S12>' : 'BSER_BattSocCalc/BSER_SOC_V201/Limiter1'
192 * '<S13>' : 'BSER_BattSocCalc/BSER_SOC_V201/Limiter2'
193 * '<S14>' : 'BSER_BattSocCalc/BSER_SOC_V201/Limiter3'
194 * '<S15>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC'
195 * '<S16>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial'
196 * '<S17>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Merge&Batt_SOC'
197 * '<S18>' : 'BSER_BattSocCalc/BSER_SOC_V201/SocStateControl'
198 * '<S19>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BSER_SocFullHldCalc'
199 * '<S20>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BmsStsDel'
200 * '<S21>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Compare To Constant1'
201 * '<S22>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Compare To Constant2'
202 * '<S23>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Compare To Constant3'
203 * '<S24>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Compare To Constant5'
204 * '<S25>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Compare To Constant6'
205 * '<S26>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Compare To Constant7'
206 * '<S27>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Compare To Zero'
207 * '<S28>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/DSOC_Filter '
208 * '<S29>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Debounce_COVhit'
209 * '<S30>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/DispSOC'
210 * '<S31>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Final_Corrt'
211 * '<S32>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Hold'
212 * '<S33>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/RS_FlipFlop'
213 * '<S34>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/SOCCorrect'
214 * '<S35>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/SocSave'
215 * '<S36>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/keep1'
216 * '<S37>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/keep6'
217 * '<S38>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BSER_SocFullHldCalc/BSER_SocDchAhFulRevCalc'
218 * '<S39>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BSER_SocFullHldCalc/Chart'
219 * '<S40>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BSER_SocFullHldCalc/EdgeRising'
220 * '<S41>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BSER_SocFullHldCalc/Stable_Calc'
221 * '<S42>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BSER_SocFullHldCalc/BSER_SocDchAhFulRevCalc/BSER_cSocAhSmlCalc'
222 * '<S43>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BSER_SocFullHldCalc/BSER_SocDchAhFulRevCalc/Detect Change'
223 * '<S44>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BSER_SocFullHldCalc/BSER_SocDchAhFulRevCalc/EdgeFalling'
224 * '<S45>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BSER_SocFullHldCalc/Stable_Calc/Chart'
225 * '<S46>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BSER_SocFullHldCalc/Stable_Calc/Detect Change'
226 * '<S47>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BmsStsDel/Chart'
227 * '<S48>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/BmsStsDel/EdgeFalling'
228 * '<S49>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/DSOC_Filter /Compare To Constant'
229 * '<S50>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Final_Corrt/Compare To Constant'
230 * '<S51>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Final_Corrt/Compare To Constant1'
231 * '<S52>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Final_Corrt/Compare To Constant5'
232 * '<S53>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/Final_Corrt/Compare To Zero1'
233 * '<S54>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/RS_FlipFlop/RS'
234 * '<S55>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/SOCCorrect/EdgeRising2'
235 * '<S56>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/SOCCorrect/LowSOCCorrect'
236 * '<S57>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/SOCCorrect/LowSOCCorrect1'
237 * '<S58>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/SocSave/Chart'
238 * '<S59>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/SocSave/Compare To Constant1'
239 * '<S60>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/SocSave/EdgeRising2'
240 * '<S61>' : 'BSER_BattSocCalc/BSER_SOC_V201/Correct&Output/SocSave/Triggered Subsystem'
241 * '<S62>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/ SOC_Ah_Agv'
242 * '<S63>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/ SOC_Ah_Max'
243 * '<S64>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/ SOC_Ah_Min'
244 * '<S65>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC'
245 * '<S66>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/ SOC_Ah_Agv/Protect from Divided by zero'
246 * '<S67>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/ SOC_Ah_Agv/Protect from Divided by zero/Compare To Constant'
247 * '<S68>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/ SOC_Ah_Max/Protect from Divided by zero'
248 * '<S69>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/ SOC_Ah_Max/Protect from Divided by zero/Compare To Constant'
249 * '<S70>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/ SOC_Ah_Min/Protect from Divided by zero'
250 * '<S71>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/ SOC_Ah_Min/Protect from Divided by zero/Compare To Constant'
251 * '<S72>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC'
252 * '<S73>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC/Compare To Constant1'
253 * '<S74>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC/Dischage'
254 * '<S75>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC/Normal'
255 * '<S76>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC/Protect from Divided by zero'
256 * '<S77>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC/charge'
257 * '<S78>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC/Dischage/Faster'
258 * '<S79>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC/Dischage/Slower'
259 * '<S80>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC/Protect from Divided by zero/Compare To Constant'
260 * '<S81>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC/charge/Faster'
261 * '<S82>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC/charge/Slower'
262 * '<S83>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Ah&DSOC/Display_SOC/DisSOC/charge/Subsystem'
263 * '<S84>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial/Compare To Constant1'
264 * '<S85>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial/Compare To Constant8'
265 * '<S86>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial/LUT_DSOC'
266 * '<S87>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial/NVM_DSOC'
267 * '<S88>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial/NVM_Judge'
268 * '<S89>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial/RunIni'
269 * '<S90>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial/SOC_LUT'
270 * '<S91>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial/SOC_NVM'
271 * '<S92>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial/NVM_Judge/Compare To Constant'
272 * '<S93>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial/NVM_Judge/Compare To Constant1'
273 * '<S94>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Initial/NVM_Judge/Compare To Constant2'
274 * '<S95>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Merge&Batt_SOC/DSOC_Fault'
275 * '<S96>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Merge&Batt_SOC/DSOC_Normal'
276 * '<S97>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Merge&Batt_SOC/Protect from Divided by zero'
277 * '<S98>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Merge&Batt_SOC/DSOC_Normal/Compare To Constant'
278 * '<S99>' : 'BSER_BattSocCalc/BSER_SOC_V201/SOC_Merge&Batt_SOC/Protect from Divided by zero/Compare To Constant'
279 * '<S100>' : 'BSER_BattSocCalc/BSER_SOC_V201/SocStateControl/SOC State'
280 */
281#endif /* RTW_HEADER_BSER_BattSocCalc_h_ */
282
283/*
284 * File trailer for generated code.
285 *
286 * [EOF]
287 */
288